Lines Matching refs:outb
450 outb(0x3CE, 0x06);
484 outb(0x3c2, 0x63); /* MISC */
485 outb(0x3c2, 0x67); /* MISC */
498 outb(0x3c2, 0x63); /* MISC */
515 outb(0x3c2, 0x63); /* MISC */
553 outb(0x3c0, (index & 0x1F) | 0x20);
555 outb(0x3c0, (index & 0x1F));
556 outb(0x3c0, data);
568 outb(svp->io_port, svp->io_index);
569 outb(svp->io_port+1, svp->io_value);
573 outb(0x3c2, 0x67); /* MISC */
574 outb(0x3c6, 0xff); /* MASK */
590 outb(0x3C6, 0xFF);
592 outb(0x3C8, 0);
596 outb(0x3C9, TextCLUT[i].r);
597 outb(0x3C9, TextCLUT[i].g);
598 outb(0x3C9, TextCLUT[i].b);
608 outb(0x3C2, 0x67);
614 outb(0x3C0, 0x30);
615 outb(0x3C0, 0x01); /* graphics mode */
637 outb(0x46E8, 0x10); /* Put into setup mode */
638 outb
639 outb(0x102, 0x01); /* Enable registers */
640 outb(0x46E8, 0x08); /* Enable video */
641 outb(0x3C3, 0x08);
642 outb(0x4AE8, 0x00);
644 outb(0x42E8, 0x80); /* Reset graphics engine? */
646 outb(0x3D4, 0x38); /* Unlock all registers */
647 outb(0x3D5, 0x48);
648 outb(0x3D4, 0x39);
649 outb(0x3D5, 0xA5);
650 outb(0x3D4, 0x40);
651 outb(0x3D5, inb(0x3D5)|0x01);
652 outb(0x3D4, 0x33);
653 outb(0x3D5, inb(0x3D5)&~0x52);
654 outb(0x3D4, 0x35);
655 outb(0x3D5, inb(0x3D5)&~0x30);
656 outb(0x3D4, 0x3A);
657 outb(0x3D5, 0x00);
658 outb(0x3D4, 0x53);
659 outb(0x3D5, 0x00);
660 outb(0x3D4, 0x31);
661 outb(0x3D5, inb(0x3D5)&~0x4B);
662 outb(0x3D4, 0x58);
664 outb(0x3D5, 0);
666 outb(0x3D4, 0x54);
667 outb(0x3D5, 0x38);
668 outb(0x3D4, 0x60);
669 outb(0x3D5, 0x07);
670 outb(0x3D4, 0x61);
671 outb(0x3D5, 0x80);
672 outb(0x3D4, 0x62);
673 outb(0x3D5, 0xA1);
674 outb(0x3D4, 0x69); /* High order bits for cursor address */
675 outb(0x3D5, 0);
677 outb(0x3D4, 0x32);
678 outb(0x3D5, inb(0x3D5)&~0x10);
691 outb(0x3d4, 0x11);
692 outb(0x3d5, 0x0e); /* unlock CR0-CR7 */
Indexes created Mon Oct 20 20:10:13 GMT 2025