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Lines Matching refs:sc_iwin

176 	sc->sc_iwin[0].iwin_base_lo = VERDE_PMMR_BASE;
177 	sc->sc_iwin[0].iwin_base_hi = 0;
178 	sc->sc_iwin[0].iwin_xlate = VERDE_PMMR_BASE;
179 	sc->sc_iwin[0].iwin_size = VERDE_PMMR_SIZE;
184 		sc->sc_iwin[1].iwin_base_lo = VERDE_OUT_XLATE_MEM_WIN0_BASE |
187 		sc->sc_iwin[1].iwin_base_hi = 0;
189 		sc->sc_iwin[1].iwin_base_lo = 0;
190 		sc->sc_iwin[1].iwin_base_hi = 0;
192 	sc->sc_iwin[1].iwin_xlate = VERDE_OUT_XLATE_MEM_WIN0_BASE;
193 	sc->sc_iwin[1].iwin_size = VERDE_OUT_XLATE_MEM_WIN_SIZE;
196 		sc->sc_iwin[2].iwin_base_lo = memstart |
199 		sc->sc_iwin[2].iwin_base_hi = 0;
201 		sc->sc_iwin[2].iwin_base_lo = 0;
202 		sc->sc_iwin[2].iwin_base_hi = 0;
204 	sc->sc_iwin[2].iwin_xlate = memstart;
205 	sc->sc_iwin[2].iwin_size = memsize;
208 		sc->sc_iwin[3].iwin_base_lo = 0 |
212 		sc->sc_iwin[3].iwin_base_lo = 0;
214 	sc->sc_iwin[3].iwin_base_hi = 0;
215 	sc->sc_iwin[3].iwin_xlate = 0;
216 	sc->sc_iwin[3].iwin_size = 0;
226 	    PCI_MAPREG_MEM_ADDR(sc->sc_iwin[1].iwin_base_lo);
227 	sc->sc_owin[0].owin_xlate_hi = sc->sc_iwin[1].iwin_base_hi;