Lines Matching defs:IOMUX_MP
232 #define IOMUX_MP(padname, mux, pad) \
269 IOMUX_MP(I2C1_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
270 IOMUX_MP(I2C1_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
273 IOMUX_MP(I2C2_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
274 IOMUX_MP(I2C2_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
277 IOMUX_MP(I2C3_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
278 IOMUX_MP(I2C3_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH),
281 IOMUX_MP(UART2_RXD, ALT0, HYS | PULL | DSEHIGH | SRE),
282 IOMUX_MP(UART2_TXD, ALT0, HYS | PULL | DSEHIGH | SRE),
285 IOMUX_MP(SD1_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE),
286 IOMUX_MP(SD1_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE),
287 IOMUX_MP(SD1_D0, ALT0, HVE | PU_22K | DSEMAX | SRE),
288 IOMUX_MP(SD1_D1, ALT0, HVE | PU_22K | DSEMAX | SRE),
289 IOMUX_MP(SD1_D2, ALT0, HVE | PU_22K | DSEMAX | SRE),
290 IOMUX_MP(SD1_D3, ALT0, HVE | PU_22K | DSEMAX | SRE),
291 // IOMUX_MP(SD1_CD, ALT0, HVE | PU_22K | DSEMAX | SRE),
294 IOMUX_MP(SD2_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE),
295 IOMUX_MP(SD2_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE),
296 IOMUX_MP(SD2_D0, ALT0, HVE | PU_22K | DSEMAX | SRE),
297 IOMUX_MP(SD2_D1, ALT0, HVE | PU_22K | DSEMAX | SRE),
298 IOMUX_MP(SD2_D2, ALT0, HVE | PU_22K | DSEMAX | SRE),
299 IOMUX_MP(SD2_D3, ALT0, HVE | PU_22K | DSEMAX | SRE),
300 IOMUX_MP(SD2_CD, ALT0, HVE | PU_22K | DSEMAX | SRE),
305 IOMUX_MP(SD3_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE),
306 IOMUX_MP(SD3_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE),
307 IOMUX_MP(SD3_D0, ALT0, HVE | PU_22K | DSEMAX | SRE),
308 IOMUX_MP(SD3_D1, ALT0, HVE | PU_22K | DSEMAX | SRE),
309 IOMUX_MP(SD3_D2, ALT0, HVE | PU_22K | DSEMAX | SRE),
310 IOMUX_MP(SD3_D3, ALT0, HVE | PU_22K | DSEMAX | SRE),
311 // IOMUX_MP(SD3_CD, ALT0, HVE | PU_22K | DSEMAX | SRE),
315 // IOMUX_MP(PWM1, ALT2, HYS | KEEPER | DSEHIGH),
Indexes created Tue Oct 14 10:09:51 GMT 2025