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Lines Matching defs:CSR_WRITE_1

148 CSR_WRITE_1(struct local *l, int reg, int data)
200 	CSR_WRITE_1(l, NCR, 0);	/* use internal PHY */
204 	CSR_WRITE_1(l, GPR, GPR_PHYPWROFF);
206 	CSR_WRITE_1(l, IMR, 0);
207 	CSR_WRITE_1(l, TCR, 0);
208 	CSR_WRITE_1(l, RCR, 0);
211 	CSR_WRITE_1(l, NCR, NCR_RST);
217 	CSR_WRITE_1(l, GPR, 0);
220 	CSR_WRITE_1(l, NCR, NCR_RST);
230 	CSR_WRITE_1(l, PAR + 0, en[0]);
231 	CSR_WRITE_1(l, PAR + 1, en[1]);
232 	CSR_WRITE_1(l, PAR + 2, en[2]);
233 	CSR_WRITE_1(l, PAR + 3, en[3]);
234 	CSR_WRITE_1(l, PAR + 4, en[4]);
235 	CSR_WRITE_1(l, PAR + 5, en[5]);
238 	CSR_WRITE_1(l, MAR + 0, 0);
239 	CSR_WRITE_1(l, MAR + 1, 0);
240 	CSR_WRITE_1(l, MAR + 2, 0);
241 	CSR_WRITE_1(l, MAR + 3, 0);
242 	CSR_WRITE_1(l, MAR + 4, 0);
243 	CSR_WRITE_1(l, MAR + 5, 0);
244 	CSR_WRITE_1(l, MAR + 6, 0);
245 	CSR_WRITE_1(l, MAR + 7, 0);
274 		CSR_WRITE_1(l, FCR, val | FCR_FLCE);
278 	CSR_WRITE_1(l, NSR, ~0);
279 	CSR_WRITE_1(l, ISR, ~0);
286 	CSR_WRITE_1(l, TCR2, TCR2_ONEPM); 
287 	CSR_WRITE_1(l, RCR, RCR_RXEN | RCR_WTDIS | RCR_DIS_LONG | RCR_DIS_CRC);
288 	CSR_WRITE_1(l, IMR, IMR_PAR);
305 	CSR_WRITE_1(l, ISR, ISR_PTM); /* clear ISR Tx complete bit */
311 	CSR_WRITE_1(l, TXPLL, len);
312 	CSR_WRITE_1(l, TXPLH, len >> 8);
313 	CSR_WRITE_1(l, TCR, TCR_TXREQ);	/* request to transmit */
347 	CSR_WRITE_1(l, ISR, ISR_PRS); /* clear ISR Rx complete bit */
390 	CSR_WRITE_1(l, EPAR, phy << 6 | reg);
391 	CSR_WRITE_1(l, EPCR, EP_EPOS | EP_ERPRR);
395 	CSR_WRITE_1(l, EPCR, 0);
405 	CSR_WRITE_1(l, EPAR, phy << 6 | reg);
406 	CSR_WRITE_1(l, EPDRL, data);
407 	CSR_WRITE_1(l, EPDRH, data >> 8);
408 	CSR_WRITE_1(l, EPCR, EP_EPOS | EP_ERPRW);
412 	CSR_WRITE_1(l, EPCR, 0);