Lines Matching defs:fclk
80 static void s3c24x0_clock_freq2(vaddr_t clkman_base, int *fclk, int *hclk,
112 int fclk, hclk;
133 Target FCLK is 405MHz, and we assume an input crystal of 12MHz
146 s3c24x0_clock_freq2(S3C2440_CLKMAN_BASE, &fclk, &hclk, &pclk);
408 s3c24x0_clock_freq2(vaddr_t clkman_base, int *fclk, int *hclk, int *pclk)
429 /* 00b: HCLK = FCLK/1*/
432 /* 01b: HCLK = FCLK/2*/
436 /* 10b: HCLK = FCLK/4 when CAMDIVN[9] (HCLK4_HALF) = 0
437 * HCLK = FCLK/8 when CAMDIVN[9] (HCLK4_HALF) = 1 */
444 /* 11b: HCLK = FCLK/3 when CAMDIVN[8] (HCLK3_HALF) = 0
445 * HCLK = FCLK/6 when CAMDIVN[8] (HCLK3_HALF) = 1 */
458 if (fclk) *fclk = f;