Lines Matching refs:writereg
113 writereg(JZ_TC_TECR, TESR_OST);
115 writereg(JZ_OST_CTRL, 0);
116 writereg(JZ_OST_CNT_LO, 0);
117 writereg(JZ_OST_CNT_HI, 0);
118 writereg(JZ_OST_DATA, 0xffffffff);
120 writereg(JZ_OST_CTRL, OSTC_EXT_EN | OSTC_MODE | OSTC_DIV_4);
122 writereg(JZ_TC_TESR, TESR_OST);
347 writereg(JZ_WDOG_TCER, 0); /* disable watchdog */
348 writereg(JZ_WDOG_TCNT, 0); /* reset counter */
349 writereg(JZ_WDOG_TDR, 128); /* wait for ~1s */
350 writereg(JZ_WDOG_TCSR, TCSR_RTC_EN | TCSR_DIV_256);
351 writereg(JZ_WDOG_TCER, TCER_ENABLE); /* fire! */