Cross Reference: /src/sys/arch/evbmips/loongson/dev/glx.c

Lines Matching refs:pcireg_t
88 pcireg_t glx_pci_read_hook(void *, pcitag_t, int);
89 void	glx_pci_write_hook(void *, pcitag_t, int, pcireg_t);
91 pcireg_t glx_get_status(void);
92 pcireg_t glx_fn0_read(int);
93 void	glx_fn0_write(int, pcireg_t);
94 pcireg_t glx_fn2_read(int);
95 void	glx_fn2_write(int, pcireg_t);
96 pcireg_t glx_fn3_read(int);
97 void	glx_fn3_write(int, pcireg_t);
98 pcireg_t glx_fn4_read(int);
99 void	glx_fn4_write(int, pcireg_t);
100 pcireg_t glx_fn5_read(int);
101 void	glx_fn5_write(int, pcireg_t);
102 pcireg_t glx_fn6_read(int);
103 void	glx_fn6_write(int, pcireg_t);
104 pcireg_t glx_fn7_read(int);
105 void	glx_fn7_write(int, pcireg_t);
107 pcireg_t (*gen_pci_conf_read)(void *, pcitag_t, int);
108 void (*gen_pci_conf_write)(void *, pcitag_t, int, pcireg_t);
212 pcireg_t
216 	pcireg_t data;
219 		return (pcireg_t) -1;
262     int offset, pcireg_t data)
309 pcireg_t
313 	pcireg_t data;
337 static const pcireg_t pcib_bar_sizes[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4] = {
346 static pcireg_t pcib_bar_values[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4];
357 pcireg_t
361 	pcireg_t data;
403 				data = (pcireg_t)rdmsr(pcib_bar_msr[index]);
422 glx_fn0_write(int reg, pcireg_t data)
481 static pcireg_t pciide_bar_size = 0x10;
482 static pcireg_t pciide_bar_value;
484 pcireg_t
488 	pcireg_t data;
553 glx_fn2_write(int reg, pcireg_t data)
606 static pcireg_t ac97_bar_size = 0x80;
607 static pcireg_t ac97_bar_value;
609 pcireg_t
613 	pcireg_t data;
665 glx_fn3_write(int reg, pcireg_t data)
708 static pcireg_t ohci_bar_size = 0x1000;
709 static pcireg_t ohci_bar_value;
711 pcireg_t
715 	pcireg_t data;
773 glx_fn4_write(int reg, pcireg_t data)
828 static pcireg_t ehci_bar_size = 0x1000;
829 static pcireg_t ehci_bar_value;
831 pcireg_t
835 	pcireg_t data;
898 glx_fn5_write(int reg, pcireg_t data)
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