Cross Reference: /src/sys/arch/hpc/stand/hpcboot/sh3/dev/sh3

Lines Matching refs:TEXT
107 	DPRINTF((TEXT("ICR0   0x%08x\n"), _reg_read_2(SH3_ICR0)));
108 	DPRINTF((TEXT("ICR1   0x%08x\n"), _reg_read_2(SH3_ICR1)));
109 	DPRINTF((TEXT("ICR2   0x%08x\n"), _reg_read_2(SH3_ICR2)));
110 	DPRINTF((TEXT("PINTER 0x%08x\n"), _reg_read_2(SH3_PINTER)));
111 	DPRINTF((TEXT("IPRA   0x%08x\n"), _reg_read_2(SH3_IPRA)));
112 	DPRINTF((TEXT("IPRB   0x%08x\n"), _reg_read_2(SH3_IPRB)));
113 	DPRINTF((TEXT("IPRC   0x%08x\n"), _reg_read_2(SH3_IPRC)));
114 	DPRINTF((TEXT("IPRD   0x%08x\n"), _reg_read_2(SH3_IPRD)));
115 	DPRINTF((TEXT("IPRE   0x%08x\n"), _reg_read_2(SH3_IPRE)));
116 	DPRINTF((TEXT("IRR0   0x%08x\n"), _reg_read_1(SH3_IRR0)));
117 	DPRINTF((TEXT("IRR1   0x%08x\n"), _reg_read_1(SH3_IRR1)));
118 	DPRINTF((TEXT("IRR2   0x%08x\n"), _reg_read_1(SH3_IRR2)));
133 	DPRINTF((TEXT("PINT enable(on |)  :")));
135 	DPRINTF((TEXT("PINT detect(high |):")));
139 	DPRINTF((TEXT("NMI(%S %S-edge),"),
143 	DPRINTF((TEXT(" %S maskable,"), r & SH3_ICR1_MAI ? "" : "never"));
144 	DPRINTF((TEXT("  SR.BL %S\n"),
147 	DPRINTF((TEXT("IRQ[3:0]pin : %S mode\n"),
150 		DPRINTF((TEXT("IRLS[0:3] %S\n"),
155 		DPRINTF((TEXT("IRQ[%d] %S\n"), i,
168 	DPRINTF((TEXT("<<<Bus State Controller>>>\n")));
170 	DPRINTF((TEXT("%-8S"), #x));					\
190 	DPRINTF((TEXT("<<<Pin Function Controller>>>\n")));
191 	DPRINTF((TEXT("[control]\n")));
193 	DPRINTF((TEXT("P%SCR :"), #x));					\
207 	DPRINTF((TEXT("SCPCR :")));
209 	DPRINTF((TEXT("\n[data]\n")));
211 	DPRINTF((TEXT("P%SDR :"), #x));					\
225 	DPRINTF((TEXT("SCPDR :")));
234 	DPRINTF((TEXT("<<<TMU>>>\n")));
238 	DPRINTF((TEXT("TCLK = %S\n"),
242 	DPRINTF((TEXT("Timer start(#0:2) [%c][%c][%c]\n"),
255 	DPRINTF((TEXT("\n")));
265 	DPRINTF((TEXT("TMU#%d:"), unit));
285 	DPRINTF((TEXT("\ncnt=0x%08x"), r32));
288 	DPRINTF((TEXT(" constant=0x%04x"), r32));
291 		DPRINTF((TEXT(" input capture=0x%08x\n"), SH3_TCPR2));
293 		DPRINTF((TEXT("\n")));
305 	DPRINTF((TEXT("<<<HD64461>>>\n")));
309 		DPRINTF((TEXT("don't exist.")));
314 	DPRINTF((TEXT("frame buffer test start\n")));
319 	DPRINTF((TEXT("frame buffer test end\n")));
322 	DPRINTF((TEXT("STBCR (System Control Register)\n")));
341 	DPRINTF((TEXT("\n")));
343 	DPRINTF((TEXT("SYSCR (System Configuration Register)\n")));
355 	DPRINTF((TEXT("\n")));
357 	DPRINTF((TEXT("SCPUCR (CPU Data Bus Control Register)\n")));
376 	DPRINTF((TEXT("\n")));
378 	DPRINTF((TEXT("\n")));
381 	DPRINTF((TEXT("NIRR (Interrupt Request Register)\n")));
394 	DPRINTF((TEXT("\n")));
396 	DPRINTF((TEXT("NIMR (Interrupt Mask Register)\n")));
409 	DPRINTF((TEXT("\n")));
411 	DPRINTF((TEXT("\n")));
415 	DPRINTF((TEXT("[PCC0 memory and I/O card (SH3 Area 6)]\n")));
416 	DPRINTF((TEXT("PCC0 Interface Status Register\n")));
429 	DPRINTF((TEXT("\n")));
431 	DPRINTF((TEXT("PCC0 General Control Register\n")));
444 	DPRINTF((TEXT("\n")));
446 	DPRINTF((TEXT("PCC0 Card Status Change Register\n")));
458 	DPRINTF((TEXT("\n")));
460 	DPRINTF((TEXT("PCC0 Card Status Change Interrupt Enable Register\n")));
471 	DPRINTF((TEXT("\ninterrupt type: ")));
474 		DPRINTF((TEXT("none\n")));
477 		DPRINTF((TEXT("level\n")));
480 		DPRINTF((TEXT("falling edge\n")));
483 		DPRINTF((TEXT("rising edge\n")));
487 	DPRINTF((TEXT("PCC0 Software Control Register\n")));
494 	DPRINTF((TEXT("\n")));
497 	DPRINTF((TEXT("[PCC1 memory card only (SH3 Area 5)]\n")));
498 	DPRINTF((TEXT("PCC1 Interface Status Register\n")));
511 	DPRINTF((TEXT("\n")));
513 	DPRINTF((TEXT("PCC1 General Contorol Register\n")));
525 	DPRINTF((TEXT("\n")));
527 	DPRINTF((TEXT("PCC1 Card Status Change Register\n")));
537 	DPRINTF((TEXT("\n")));
539 	DPRINTF((TEXT("PCC1 Card Status Change Interrupt Enable Register\n")));
549 	DPRINTF((TEXT("\n")));
551 	DPRINTF((TEXT("PCC1 Software Control Register\n")));
558 	DPRINTF((TEXT("\n")));
561 	DPRINTF((TEXT("[General Control]\n")));
562 	DPRINTF((TEXT("PCC0 Output pins Control Register\n")));
569 	DPRINTF((TEXT("\n")));
571 	DPRINTF((TEXT("PCC1 Output pins Control Register\n")));
580 	DPRINTF((TEXT("\n")));
582 	DPRINTF((TEXT("PC Card General Control Register\n")));
589 	DPRINTF((TEXT("\n")));
598 	DPRINTF((TEXT("GPIO Port Control Register\n")));
600 	DPRINTF((TEXT("GPIO Port Data Register\n")));
602 	DPRINTF((TEXT("GPIO Port Interrupt Control Register\n")));
604 	DPRINTF((TEXT("GPIO Port Interrupt Status  Register\n")));
622 DPRINTF((TEXT("SH7707 frame buffer DMA address: 0x%08x\n"),