Lines Matching refs:csregh
169 bus_space_handle_t csregh;
177 0, &csregh);
178 reg = it8368_reg_read(csregt, csregh, IT8368_CTRL_REG);
183 it8368_reg_write(csregt, csregh, IT8368_CTRL_REG, reg);
184 reg = it8368_reg_read(csregt, csregh, IT8368_CTRL_REG);
189 it8368_reg_write(csregt, csregh, IT8368_CTRL_REG, reg);
190 reg = it8368_reg_read(csregt, csregh, IT8368_CTRL_REG);
196 it8368_reg_write(csregt, csregh, IT8368_CTRL_REG, oreg);
197 bus_space_unmap(csregt, csregh, ca->ca_csreg.cssize);
220 bus_space_handle_t csregh;
229 csregh = sc->sc_csregh;
239 reg = it8368_reg_read(csregt, csregh, IT8368_CTRL_REG);
241 it8368_reg_write(csregt, csregh, IT8368_CTRL_REG, reg);
244 reg = it8368_reg_read(csregt, csregh, IT8368_MFIODIR_REG);
246 it8368_reg_write(csregt, csregh, IT8368_MFIODIR_REG, reg);
249 reg = it8368_reg_read(csregt, csregh, IT8368_MFIOSEL_REG);
251 it8368_reg_write(csregt, csregh, IT8368_MFIOSEL_REG, reg);
254 reg = it8368_reg_read(csregt, csregh, IT8368_MFIOPOSINTEN_REG);
256 it8368_reg_write(csregt, csregh, IT8368_MFIOPOSINTEN_REG, reg);
257 reg = it8368_reg_read(csregt, csregh, IT8368_MFIONEGINTEN_REG);
259 it8368_reg_write(csregt, csregh, IT8368_MFIONEGINTEN_REG, reg);
265 it8368_reg_write(csregt, csregh, IT8368_GPIODIR_REG, reg);
271 reg = it8368_reg_read(csregt, csregh, IT8368_CTRL_REG);
274 it8368_reg_write(csregt, csregh, IT8368_CTRL_REG, reg);
277 it8368_reg_read(csregt, csregh, IT8368_CTRL_REG)) {
294 reg = it8368_reg_read(csregt, csregh, IT8368_CTRL_REG);
298 it8368_reg_write(csregt, csregh, IT8368_CTRL_REG, reg);
329 bus_space_handle_t csregh = sc->sc_csregh;
332 reg = it8368_reg_read(csregt, csregh, IT8368_GPIONEGINTSTAT_REG);
337 it8368_reg_write(csregt, csregh,
345 it8368_reg_write(csregt, csregh, IT8368_GPIONEGINTSTAT_REG,
358 it8368_reg_write(csregt, csregh, IT8368_GPIONEGINTSTAT_REG,
394 bus_space_handle_t csregh = sc->sc_csregh;
402 it8368_reg_write(csregt, csregh, IT8368_GPIONEGINTEN_REG, reg);
404 it8368_reg_write(csregt, csregh, IT8368_GPIOPOSINTEN_REG, 0);
417 reg = it8368_reg_read(csregt, csregh, IT8368_GPIODATAIN_REG);
433 bus_space_handle_t csregh = sc->sc_csregh;
448 reg = it8368_reg_read(csregt, csregh, IT8368_GPIONEGINTEN_REG);
450 it8368_reg_write(csregt, csregh, IT8368_GPIONEGINTEN_REG, reg);
460 bus_space_handle_t csregh = sc->sc_csregh;
472 reg = it8368_reg_read(csregt, csregh, IT8368_GPIONEGINTEN_REG);
474 it8368_reg_write(csregt, csregh, IT8368_GPIONEGINTEN_REG, reg);
655 bus_space_handle_t csregh = sc->sc_csregh;
659 reg = it8368_reg_read(csregt, csregh, IT8368_GPIODATAOUT_REG);
662 it8368_reg_write(csregt, csregh, IT8368_GPIODATAOUT_REG, reg);
672 reg = it8368_reg_read(csregt, csregh, IT8368_GPIODATAOUT_REG);
675 it8368_reg_write(csregt, csregh, IT8368_GPIODATAOUT_REG, reg);
687 reg = it8368_reg_read(csregt, csregh, IT8368_GPIODATAOUT_REG);
689 it8368_reg_write(csregt, csregh, IT8368_GPIODATAOUT_REG, reg);
697 reg = it8368_reg_read(csregt, csregh, IT8368_GPIODATAOUT_REG);
699 it8368_reg_write(csregt, csregh, IT8368_GPIODATAOUT_REG, reg);
712 bus_space_handle_t csregh = sc->sc_csregh;
716 reg = it8368_reg_read(csregt, csregh, IT8368_GPIODATAOUT_REG);
719 it8368_reg_write(csregt, csregh, IT8368_GPIODATAOUT_REG, reg);
732 #define PRINTGPIO(m) __dbg_bit_print(it8368_reg_read(csregt, csregh, \
734 #define PRINTMFIO(m) __dbg_bit_print(it8368_reg_read(csregt, csregh, \
740 bus_space_handle_t csregh = sc->sc_csregh;
759 __dbg_bit_print(it8368_reg_read(csregt, csregh, IT8368_CTRL_REG), 0, 15,
761 __dbg_bit_print(it8368_reg_read(csregt, csregh, IT8368_GPIODATAIN_REG),