Cross Reference: /src/sys/arch/hpcmips/tx/tx39power.c

Lines Matching refs:tc
100 	tx_chipset_tag_t tc;
104 	tc = sc->sc_tc = ta->ta_tc;
105 	tx_conf_register_power(tc, self);
111 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
113 	tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
116 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
122 	tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
126 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSPWRINT),
129 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGPWRINT),
133 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSPWROKINT),
136 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGPWROKINT),
140 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSONBUTNINT),
143 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGONBUTNINT),
151 	tx_chipset_tag_t tc = tx_conf_get_tag();
152 	struct tx39power_softc *sc = tc->tc_powert;
157 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
160 	iregs[0] = tx_conf_read(tc, TX39_INTRENABLE6_REG);
161 	iregs[1] = tx_conf_read(tc, TX39_INTRENABLE1_REG);
162 	iregs[2] = tx_conf_read(tc, TX39_INTRENABLE2_REG);
163 	iregs[3] = tx_conf_read(tc, TX39_INTRENABLE3_REG);
164 	iregs[4] = tx_conf_read(tc, TX39_INTRENABLE4_REG);
165 	iregs[5] = tx_conf_read(tc, TX39_INTRENABLE5_REG);
167 	iregs[7] = tx_conf_read(tc, TX39_INTRENABLE7_REG);
168 	iregs[8] = tx_conf_read(tc, TX39_INTRENABLE8_REG);
171 	tx_conf_write(tc, TX39_INTRENABLE6_REG, TX39_INTRENABLE6_GLOBALEN);
172 	tx_conf_write(tc, TX39_INTRENABLE1_REG, 0);
173 	tx_conf_write(tc, TX39_INTRENABLE2_REG, 0);
174 	tx_conf_write(tc, TX39_INTRENABLE3_REG, 0);
175 	tx_conf_write(tc, TX39_INTRENABLE4_REG, 0);
176 	tx_conf_write(tc, TX39_INTRENABLE5_REG, 0);
178 	tx_conf_write(tc, TX39_INTRENABLE7_REG, 0);
179 	tx_conf_write(tc, TX39_INTRENABLE8_REG, 0);
182 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_NEGONBUTNINT);
183 	tx_conf_write(tc, TX39_INTRENABLE5_REG, TX39_INTRSTATUS5_NEGONBUTNINT);
187 	tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
191 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_NEGONBUTNINT);
194 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
196 	tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
200 	tx_conf_write(tc, TX39_INTRENABLE6_REG, iregs[0]);
201 	tx_conf_write(tc, TX39_INTRENABLE1_REG, iregs[1]);
202 	tx_conf_write(tc, TX39_INTRENABLE2_REG, iregs[2]);
203 	tx_conf_write(tc, TX39_INTRENABLE3_REG, iregs[3]);
204 	tx_conf_write(tc, TX39_INTRENABLE4_REG, iregs[4]);
205 	tx_conf_write(tc, TX39_INTRENABLE5_REG, iregs[5]);
207 	tx_conf_write(tc, TX39_INTRENABLE7_REG, iregs[7]);
208 	tx_conf_write(tc, TX39_INTRENABLE8_REG, iregs[8]);
282 	tx_chipset_tag_t tc = sc->sc_tc;
285 	reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
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