Cross Reference: /src/sys/arch/hpcmips/tx/tx39spi.c

Lines Matching defs:tc
73 	tx_chipset_tag_t tc = sc->sc_tc = ta->ta_tc;
76 	reg = tx_conf_read(tc, TX39_SPICTRL_REG);
78 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
79 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIBUFAVAILINT);
80 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIERRINT);
81 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIRCVINT);
82 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIEMPTYINT);
85 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_SPI),
144 	tx_chipset_tag_t tc = sc->sc_tc;
146 	while(!(tx_conf_read(tc, TX39_INTRSTATUS5_REG) & TX39_INTRSTATUS5_SPIBUFAVAILINT))
148 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIBUFAVAILINT);
150 	tx_conf_write(tc, TX39_SPITXHOLD_REG , w & 0xffff);
156 	tx_chipset_tag_t tc = sc->sc_tc;
158 	while(!(tx_conf_read(tc, TX39_INTRSTATUS5_REG) & TX39_INTRSTATUS5_SPIRCVINT))
160 	tx_conf_write(tc, TX39_INTRCLEAR5_REG, TX39_INTRSTATUS5_SPIRCVINT);
162 	return tx_conf_read(tc, TX39_SPIRXHOLD_REG) & 0xffff;
168 	tx_chipset_tag_t tc = sc->sc_tc;
169 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
174 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
180 	tx_chipset_tag_t tc = sc->sc_tc;
181 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
182 	tx_conf_write(tc, TX39_SPICTRL_REG, TX39_SPICTRL_DELAYVAL_SET(reg, n));
188 	tx_chipset_tag_t tc = sc->sc_tc;
189 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
190 	tx_conf_write(tc, TX39_SPICTRL_REG, TX39_SPICTRL_BAUDRATE_SET(reg, n));
196 	tx_chipset_tag_t tc = sc->sc_tc;
197 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
202 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
208 	tx_chipset_tag_t tc = sc->sc_tc;
209 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
214 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
220 	tx_chipset_tag_t tc = sc->sc_tc;
221 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
226 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
232 	tx_chipset_tag_t tc = sc->sc_tc;
233 	txreg_t reg = tx_conf_read(tc, TX39_SPICTRL_REG);
238 	tx_conf_write(tc, TX39_SPICTRL_REG, reg);
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