Lines Matching defs:summitfb_write4
203 summitfb_write4(struct summitfb_softc *sc, uint32_t offset, uint32_t val)
218 summitfb_write4(sc, VISFX_VRAM_WRITE_MODE, mode);
228 summitfb_write4(sc, VISFX_VRAM_READ_MODE, mode);
676 summitfb_write4(sc, VISFX_APERTURE_ACCESS, VISFX_DEPTH_8);
678 summitfb_write4(sc, VISFX_OTR, OTR_T | OTR_L1 | OTR_L0);
682 summitfb_write4(sc, VISFX_APERTURE_ACCESS, VISFX_DEPTH_32);
684 summitfb_write4(sc, VISFX_OTR, OTR_A);
686 summitfb_write4(sc, VISFX_IBO, RopSrc);
702 summitfb_write4(sc, 0xb08044, 0x1b); /* MFU_BSCTD */
703 summitfb_write4(sc, 0xb08048, 0x1b); /* MFU_BSCCTL */
705 summitfb_write4(sc, 0x920860, 0xe4); /* FBC_RBS */
706 summitfb_write4(sc, 0x921114, 0); /* CPE, clip plane enable */
707 summitfb_write4(sc, 0x9211d8, 0); /* FCDA */
709 summitfb_write4(sc, 0xa00818, 0); /* WORG window origin */
710 summitfb_write4(sc, 0xa0081c, 0); /* FBS front buffer select*/
711 summitfb_write4(sc, 0xa00850, 0); /* MISC_CTL */
712 summitfb_write4(sc, 0xa0086c, 0); /* WCE window clipping enable */
716 summitfb_write4(sc, VISFX_CONTROL, 0); // clear WFC
717 summitfb_write4(sc, VISFX_APERTURE_ACCESS, VISFX_DEPTH_8);
718 summitfb_write4(sc, VISFX_PIXEL_MASK, 0xffffffff);
719 summitfb_write4(sc, VISFX_PLANE_MASK, 0xffffffff);
720 summitfb_write4(sc, VISFX_FOE, FOE_BLEND_ROP);
721 summitfb_write4(sc, VISFX_IBO, RopSrc);
724 summitfb_write4(sc, VISFX_CLIP_TL, 0);
725 summitfb_write4(sc, VISFX_CLIP_WH,
728 summitfb_write4(sc, VISFX_CURSOR_POS, 0);
730 summitfb_write4(sc, VISFX_TCR, 0x10001000);
733 summitfb_write4(sc, VISFX_OTR, OTR_T | OTR_L1 | OTR_L0);
740 summitfb_write4(sc, VISFX_IAA(i), IAA_8F | IAA_CFS1);
742 summitfb_write4(sc, VISFX_CFS(1), CFS_8F | CFS_BYPASS);
744 summitfb_write4(sc, VISFX_CFS(16), CFS_8I | CFS_LUT0);
745 summitfb_write4(sc, VISFX_CFS(17), CFS_8I | CFS_LUT0);
750 summitfb_write4(sc, VISFX_PLANE_MASK, 0xff);
751 summitfb_write4(sc, VISFX_IBO, 0); /* GXclear */
752 summitfb_write4(sc, VISFX_FG_COLOUR, 0);
753 summitfb_write4(sc, VISFX_START, 0);
754 summitfb_write4(sc, VISFX_SIZE, (sc->sc_width << 16) | sc->sc_height);
756 summitfb_write4(sc, VISFX_PLANE_MASK, 0xffffffff);
759 summitfb_write4(sc, VISFX_FATTR, 0);
1046 summitfb_write4(sc, VISFX_COLOR_INDEX, idx);
1047 summitfb_write4(sc, VISFX_COLOR_VALUE, (r << 16) | ( g << 8) | b);
1048 summitfb_write4(sc, VISFX_COLOR_MASK, 0xff);
1067 summitfb_write4(sc, VISFX_IBO, RopSrc);
1068 summitfb_write4(sc, VISFX_FG_COLOUR, 0);
1069 summitfb_write4(sc, VISFX_START, 0);
1070 summitfb_write4(sc, VISFX_SIZE, (sc->sc_width << 16) | sc->sc_height);
1080 summitfb_write4(sc, VISFX_IBO, RopSrc);
1081 summitfb_write4(sc, VISFX_FG_COLOUR, bg);
1082 summitfb_write4(sc, VISFX_START, (x << 16) | y);
1083 summitfb_write4(sc, VISFX_SIZE, (wi << 16) | he);
1106 summitfb_write4(sc, VISFX_IBO, rop);
1107 summitfb_write4(sc, VISFX_COPY_SRC, (xs << 16) | ys);
1108 summitfb_write4(sc, VISFX_COPY_WH, (wi << 16) | he);
1109 summitfb_write4(sc, VISFX_COPY_DST, (xd << 16) | yd);
1200 summitfb_write4(sc, VISFX_IBO, RopSrc);
1201 summitfb_write4(sc, VISFX_FG_COLOUR, fg);
1202 summitfb_write4(sc, VISFX_BG_COLOUR, bg);
1204 summitfb_write4(sc, VISFX_PIXEL_MASK, mask);
1206 summitfb_write4(sc, VISFX_VRAM_WRITE_DEST, (y << 16) | x);
1214 summitfb_write4(sc, VISFX_VRAM_WRITE_DATA_INCRY,
1222 summitfb_write4(sc, VISFX_VRAM_WRITE_DATA_INCRY,
1281 summitfb_write4(sc, VISFX_IBO,
1295 summitfb_write4(sc, VISFX_VRAM_WRITE_DEST, ((y + i) << 16) | x);
1299 summitfb_write4(sc, VISFX_VRAM_WRITE_DATA_INCRX,
1429 summitfb_write4(sc, VISFX_CURSOR_POS, pos);
1455 summitfb_write4(sc, VISFX_CURSOR_INDEX, 0);
1457 summitfb_write4(sc, VISFX_CURSOR_BG, rgb);
1459 summitfb_write4(sc, VISFX_CURSOR_FG, rgb);
1468 summitfb_write4(sc, VISFX_CURSOR_INDEX, 0);
1487 summitfb_write4(sc, VISFX_CURSOR_DATA, latch);
1505 summitfb_write4(sc, VISFX_CURSOR_DATA, latch);
1508 summitfb_write4(sc, VISFX_CURSOR_INDEX, 0x80);
1528 summitfb_write4(sc, VISFX_CURSOR_DATA, latch);
1546 summitfb_write4(sc, VISFX_CURSOR_DATA, latch);
1564 summitfb_write4(sc, VISFX_MPC, MPC_VIDEO_ON);
1566 summitfb_write4(sc, VISFX_MPC, MPC_VSYNC_OFF | MPC_HSYNC_OFF);