Lines Matching defs:op1
62 op1: .equ 5 ; multiplicand
81 stws,ma op1,4(%sp) ; save registers on stack
90 ldws 0(%arg0),op1 ; get multiplicand
92 addib,= 0,op1,fini0 ; op1 = 0, product = 0
94 bb,>= op1,0,mpy1 ; test msb of multiplicand
100 extru,= op1,31,31,op1 ; clear msb of multiplicand
101 b mpy1 ; if op1 < 2**32, start multiply
133 ; ---- bits = 0001 ---- add op1, then shift 4 bits
135 addb,tr op1,pu,sh4n+4 ; add op1 to product, to shift
138 ; ---- bits = 0010 ---- add op1, add op1, then shift 4 bits
140 addb,tr op1,pu,sh4n ; add 2*op1, to shift
141 addb,uv op1,pu,sh4c ; product right 4 bits
143 ; ---- bits = 0011 ---- add op1, add 2*op1, shift 4 bits
145 addb,tr op1,pu,sh4n-4 ; add op1 & 2*op1, shift
146 sh1add,nuv op1,pu,pu ; product right 4 bits
148 ; ---- bits = 0100 ---- shift 2, add op1, shift 2
153 ; ---- bits = 0101 ---- add op1, shift 2, add op1, and shift 2 again
155 addb,tr op1,pu,sh2us ; add op1 to product
158 ; ---- bits = 0110 ---- add op1, add op1, shift 2, add op1, and shift 2 again
160 addb,tr op1,pu,sh2c ; add 2*op1, to shift 2 bits
161 addb,nuv op1,pu,sh2us ; br. if not overflow
163 ; ---- bits = 0111 ---- subtract op1, shift 3, add op1, and shift 1
166 sub pu,op1,pu ; subtract op1, br. to sh3s
169 ; ---- bits = 1000 ---- shift 3, add op1, shift 1
174 ; ---- bits = 1001 ---- add op1, shift 3, add op1, shift 1
176 addb,tr op1,pu,sh3us ; add op1, to shift 3, add op1,
179 ; ---- bits = 1010 ---- add op1, add op1, shift 3, add op1, shift 1
181 addb,tr op1,pu,sh3c ; add 2*op1, to shift 3 bits
182 addb,nuv op1,pu,sh3us ; br. if no overflow
184 ; ---- bits = 1011 ---- add -op1, shift 2, add -op1, shift 2, inc. next index
186 addib,tr 1,brindex,sh2s ; add 1 to index, subtract op1,
187 sub pu,op1,pu ; shift 2 with minus sign
189 ; ---- bits = 1100 ---- shift 2, subtract op1, shift 2, increment next index
194 ; ---- bits = 1101 ---- add op1, shift 2, add -op1, shift 2
196 addb,tr op1,pu,sh2ns ; add op1, to shift 2
199 ; ---- bits = 1110 ---- shift 1 signed, add -op1, shift 3 signed
204 ; ---- bits = 1111 ---- add -op1, shift 4 signed
206 addib,tr 1,brindex,sh4s ; add 1 to index, subtract op1,
207 sub pu,op1,pu ; to shift 4 signed
220 addb,tr op1,pu,lastadd ; do one more add, then finish
230 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
234 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
238 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
243 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
256 sub pu,op1,pu ; subtract op1
260 addb,tr op1,pu,lastadd ; do one more add, then finish
264 sub pu,op1,pu ; subtract op1 from product
268 addb,tr op1,pu,lastadd ; do one more add, then finish
272 sub pu,op1,pu ; subtract op1 from product
276 addb,tr op1,pu,lastadd ; do one more add, then finish
279 fini0: movib,tr 0,pl,fini ; product = 0 as op1 = 0
283 addb,tr op1,pu,sh2a ; add op1
288 addb,tr op1,pu,sh2a ; add op1 to product
292 addb,tr op1,pu,sh2a ; add op1 to product
314 ldws,mb -4(%sp),op1 ; restore registers
Indexes created Sat Oct 11 19:10:01 GMT 2025