Lines Matching defs:pu
59 pu: .equ 3 ; upper part of product
79 impyu: stws,ma pu,4(%sp) ; save registers on stack
93 addi 0,gr0,pu ; clear product
103 shd gr0,op2,1,pu ; shift op2 left 31 for result
115 sh4n: shd pu,pl,4,pl ; shift product right 4 bits
117 extru pu,27,28,pu ; <= zero
131 shd pu,pl,4,pl ; product right 4 bits
135 addb,tr op1,pu,sh4n+4 ; add op1 to product, to shift
136 shd pu,pl,4,pl ; product right 4 bits
140 addb,tr op1,pu,sh4n ; add 2*op1, to shift
141 addb,uv op1,pu,sh4c ; product right 4 bits
145 addb,tr op1,pu,sh4n-4 ; add op1 & 2*op1, shift
146 sh1add,nuv op1,pu,pu ; product right 4 bits
151 shd pu,pl,2,pl ; shift product 2 bits
155 addb,tr op1,pu,sh2us ; add op1 to product
156 shd pu,pl,2,pl ; shift 2 bits
160 addb,tr op1,pu,sh2c ; add 2*op1, to shift 2 bits
161 addb,nuv op1,pu,sh2us ; br. if not overflow
166 sub pu,op1,pu ; subtract op1, br. to sh3s
172 shd pu,pl,3,pl ; shift product right 3 bits
176 addb,tr op1,pu,sh3us ; add op1, to shift 3, add op1,
177 shd pu,pl,3,pl ; and shift 1
181 addb,tr op1,pu,sh3c ; add 2*op1, to shift 3 bits
182 addb,nuv op1,pu,sh3us ; br. if no overflow
187 sub pu,op1,pu ; shift 2 with minus sign
192 shd pu,pl,2,pl ; shift right 2 bits signed
196 addb,tr op1,pu,sh2ns ; add op1, to shift 2
197 shd pu,pl,2,pl ; right 2 unsigned, etc.
202 shd pu,pl,1,pl ; shift 1 bit
207 sub pu,op1,pu ; to shift 4 signed
213 shd pu,pl,4,pl ; shift 4 signed
217 sh4s: shd pu,pl,4,pl
219 shd pm,pu,4,pu ; shift 4, minus signed
220 addb,tr op1,pu,lastadd ; do one more add, then finish
224 shd pc,pu,4,pu ; shift 4 with overflow
228 sh3c: shd pu,pl,3,pl ; shift product 3 bits
229 shd pc,pu,3,pu ; shift 3 signed
230 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
231 shd pu,pl,1,pl
233 sh3us: extru pu,28,29,pu ; shift 3 unsigned
234 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
235 shd pu,pl,1,pl
237 sh3sa: extrs pu,28,29,pu ; shift 3 signed
238 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
239 shd pu,pl,1,pl
241 sh3s: shd pu,pl,3,pl ; shift 3 minus signed
242 shd pm,pu,3,pu
243 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
244 shd pu,pl,1,pl
247 extru pu,30,31,pu
252 extru pu,29,30,pu ; shift unsigned
254 sh2s: shd pu,pl,2,pl ; shift with minus sign
255 shd pm,pu,2,pu ;
256 sub pu,op1,pu ; subtract op1
257 shd pu,pl,2,pl ; shift with minus sign
259 shd pm,pu,2,pu ; shift with minus sign
260 addb,tr op1,pu,lastadd ; do one more add, then finish
263 sh2sb: extrs pu,29,30,pu ; shift 2 signed
264 sub pu,op1,pu ; subtract op1 from product
265 shd pu,pl,2,pl ; shift with minus sign
267 shd pm,pu,2,pu ; shift with minus sign
268 addb,tr op1,pu,lastadd ; do one more add, then finish
271 sh1sa: extrs pu,30,31,pu ; signed
272 sub pu,op1,pu ; subtract op1 from product
273 shd pu,pl,3,pl ; shift 3 with minus sign
275 shd pm,pu,3,pu
276 addb,tr op1,pu,lastadd ; do one more add, then finish
280 stws pu,0(%arg2) ; save high part of result
282 sh2us: extru pu,29,30,pu ; shift 2 unsigned
283 addb,tr op1,pu,sh2a ; add op1
284 shd pu,pl,2,pl ; shift 2 bits
286 sh2c: shd pu,pl,2,pl
287 shd pc,pu,2,pu ; shift with carry
288 addb,tr op1,pu,sh2a ; add op1 to product
289 shd pu,pl,2,pl ; br. to sh2 to shift pu
291 sh2sa: extrs pu,29,30,pu ; shift with sign
292 addb,tr op1,pu,sh2a ; add op1 to product
293 shd pu,pl,2,pl ; br. to sh2 to shift pu
296 extru pu,29,30,pu
302 addc pu,saveop2,pu
306 fini: stws pu,0(%arg2) ; save high part of result
317 ldws,mb -4(%sp),pu ; restore registers
Indexes created Thu Oct 02 14:10:14 GMT 2025