Lines Matching refs:r21
265 mov r21=ar.rsc
294 * r18=pr, r19=length, r20=unat, r21=rsc, r22=iip, r23=TOS
313 // r18=pr, r19=length, r20=unat, r21=rsc, r22=iip, r23=TOS
332 // r18=pr, r19=rnat, r20=bspstore, r21=rsc, r22=iip, r23=rp
352 // r18=fpsr, r19=rnat, r20=bspstore, r21=rsc, r22=iip, r23=ipsr
361 st8 [r31]=r21,16 // rsc
366 (p13) mov r21=ar.k6 // kernel register stack
369 (p13) dep r20=r20,r21,0,9 // align dirty registers
467 st8.spill [r3]=r21,16 // r21
657 ld8.fill r21=[r3],-16 // r21
710 ld8 r21=[r31],24 // rnat
788 mov ar.rnat=r21
874 add r21=16,r18 // tag
877 ld8 r21=[r21] // check VHPT tag
880 cmp.ne p15,p0=r21,r19
883 ld8 r21=[r18] // read pte
885 itc.i r21 // insert pte
899 add r21=16,r20 // tag location
901 ld8 r21=[r21] // read tag
903 cmp.ne p15,p0=r21,r19 // compare tags
906 ld8 r21=[r20] // read pte
909 or r21=r21,r22
911 st8 [r20]=r21,8
927 st8 [r18]=r21,8 // store pte
933 itc.i r21 // and place in TLB
960 add r21=16,r18 // tag
963 ld8 r21=[r21] // check VHPT tag
966 cmp.ne p15,p0=r21,r19
969 ld8 r21=[r18] // read pte
971 itc.d r21 // insert pte
985 add r21=16,r20 // tag location
987 ld8 r21=[r21] // read tag
989 cmp.ne p15,p0=r21,r19 // compare tags
992 ld8 r21=[r20] // read pte
995 or r21=r21,r22
997 st8 [r20]=r21,8
1013 st8 [r18]=r21,8 // store pte
1019 itc.d r21 // and place in TLB
1277 add r21=16,r20 // tag location
1279 ld8 r21=[r21] // read tag
1281 cmp.ne p15,p0=r21,r19 // compare tags
1284 ld8 r21=[r20] // read pte
1287 or r21=r22,r21 // set dirty & access bit
1289 st8 [r20]=r21,8 // store back
1305 st8 [r18]=r21,8 // store pte
1311 itc.d r21 // and place in TLB
1351 add r21=16,r20 // tag location
1353 ld8 r21=[r21] // read tag
1355 cmp.ne p15,p0=r21,r19 // compare tags
1358 ld8 r21=[r20] // read pte
1361 or r21=r22,r21 // set accessed bit
1363 st8 [r20]=r21,8 // store back
1379 st8 [r18]=r21,8 // store pte
1385 itc.i r21 // and place in TLB
1425 add r21=16,r20 // tag location
1427 ld8 r21=[r21] // read tag
1429 cmp.ne p15,p0=r21,r19 // compare tags
1432 ld8 r21=[r20] // read pte
1435 or r21=r22,r21 // set accessed bit
1437 st8 [r20]=r21,8 // store back
1453 st8 [r18]=r21,8 // store pte
1459 itc.d r21 // and place in TLB
Indexes created Sun Oct 19 02:09:48 GMT 2025