Lines Matching refs:the
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42 was reading the intermediate bytes. Emulation now only
43 reads the required bytes.
45 2) "flogn", "flog2", and "flog10" of "1" was setting the
49 3) For an opclass three FP instruction where the effective addressing
50 mode was pre-decrement or post-increment and the address register
51 was A0 or A1, the address register was not being updated as a result
52 of the operation. This has been corrected.
54 4) Beta 1.2 version had the following erratum:
59 a failing value to the 68060SP, the package ignores
66 ADDR should cause a "segmentation violation", the memory read
67 requested by the package should return a failing value
68 to the package. Since the package currently ignores this
69 return value, the user program will continue to the
70 next instruction, and the result created in fp0 will be
75 This has been fixed in the current release.
81 the package creates a 16-byte access error stack frame
82 from the current exception stack frame and exits
83 through the "call-out" _real_access(). This is the process
84 as described in the MC68060 User's Manual.
86 For instruction read access errors, the info stacked is:
93 The valid FSLW bits are:
103 all other bits are EQUAL TO ZERO and can be set by the _real_access()
104 "call-out" stub by the user as appropriate. The MC68060 User's Manual
105 stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
108 For data read/write access errors, the info stacked is:
115 The valid FSLW bits are:
125 all other bits are EQUAL TO ZERO and can be set by the _real_access()
126 "call-out" stub by the user as appropriate. The MC68060 User's Manual
127 stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
Indexes created Sun Feb 15 12:34:49 CET 2026