Lines Matching refs:Then
626 # then stored in either the FP regfile, data regfile, or memory. #
629 # If the exception is enabled, then this handler must create the #
866 # then stored in either the FP regfile, data regfile, or memory. #
869 # If the exception is enabled, then this handler must create the #
972 # (0x00000000_80000000_00000000), then the machine will take an
1005 # (0x00000000_80000000_00000000), then the machine will take an
1033 # (0x00000000_80000000_00000000), then the machine will take an
1036 # then we have to branch to real_inex.
1156 # from the FP register file. The instruction is then emulated by #
1159 # saved, then we check to see if any enabled exceptions resulted from #
1160 # instruction emulation. If none, then we exit through the "callout" #
1161 # _fpsp_done(). If there is an enabled FP exception, then we insert #
1162 # this exception into the FPU in the fsave state frame and then exit #
1168 # If a Trace exception is pending, then the current exception stack #
1173 # as the result of emulation, then an exit either occurs through #
1176 # should occur, then we must create an exception stack frame of that #
1230 # exception, then the a7' calculated here is wrong since it doesn't
1277 # input is an UNNORM, then convert it to a NORM, DENORM, or ZERO.
1569 # address register was the stack pointer used from user mode, then let's update
1570 # it here. if it was used from supervisor mode, then we have to handle this
1631 # was exact, then a branch to _real_inex() is made.
1643 # from FPIAR and put it in the trace stack frame then jump to _real_trace().
1733 # exception occurred from user mode, then simply update a7 and exit normally.
2050 # trace stack frame then jump to _real_trace().
2196 # the strategy is to move the exception frame "down" 12 bytes. then, we
2236 # the strategy is to move the exception frame "down" 12 bytes. then, we
2276 # the strategy is to move the exception frame "down" 12 bytes. then, we
2306 # if we're stuffing a source operand back into an fsave frame then we
2421 # emulation, then the result is stored to the destination register and #
2423 # signalled as a result of emulation, then an fsave state frame #
2448 # then we must create an 8 word "FPU disabled" exception stack frame #
2454 # "callout" returns a failing result indicating an access error, then #
2594 # store a result. then, only fcmp will branch back and pick up a dst operand.
2663 # enabled? if so, then we have to stuff an overflow frame into the FPU.
2680 # or underflow that was disabled, then we have to force an overflow or
2722 # the trace stack frame then jump to _real_trace().
3103 # do just this and then exits through _real_operr(). #
3293 # do just this and then exits through _real_snan(). #
3303 # if the effective addressing mode was -() or ()+, then the address #
3305 # was -(a7) from supervisor mode, then the exception frame currently #
3362 # fpsp_unsupp(), then we need to do nothing else for them here.
3491 # post-increment, then the address register did not get updated.
3594 # instruction in order to get this value and then store it to the #
3772 # adjusts the operand using fix_skewed_ops() and then branches to #
3893 # but, if the FPU is disabled, then we need to jump to the FPU diabled
3974 # for instruction emulation. The correct emulation routine is then #
3978 # FP instruction emulation. If so, then an FP exception of the correct #
3982 # Trace exception is enabled. If so, then we must create a Trace #
3987 # may flag that a BSUN exception should be taken. If so, then the #
3992 # is made through _real_trap(). If a Trace exception is pending, then #
3995 # then the handler exits though the callout _fpsp_done(). #
3998 # "callout" returns a failing value, then an access error stack frame #
4153 # mode was (a7)+, then the stack frame for the rte must be shifted "up"
4195 # and overflow wasn't enabled but inexact was (yech!) then this is
4207 # we'll insert this new exception into the FPU and then return.
4214 # or underflow that was disabled, then we have to force an overflow or
5190 #--THEN WE RETURN SGN*SIN(R). SGN*SIN(R) IS COMPUTED BY
5243 #--THEN WE RETURN SGN*COS(R). SGN*COS(R) IS COMPUTED BY
5688 #--Then, we need to compute A := R-P and a := r-p
6119 #--Then, we need to compute A := R-P and a := r-p
7672 # then load the exponent with +/1 $3fff.
8436 # if the input is exactly equal to one, then exit through ld_pzero.
8580 #--IF 1+Z > 3/2 OR 1+Z < 1/2, THEN X, WHICH IS ROUNDING 1+Z,
8604 #--CASE 1: 1+Z < 1, THEN K = -1 AND Y-F = (2-F) + 2Z
8605 #--CASE 2: 1+Z > 1, THEN K = 0 AND Y-F = (1-F) + Z
8954 # 4. Overwrite r := r * log2. Then #
8970 # log_10(2)/64 and L10 is the natural log of 10. Then #
9617 # the src value. then, jump to the norm part of the routine.
9731 # If (L < 0) then #
9739 # 3.2 If R > Y, then { R := R - Y, Q := Q + 1} #
9749 # 5.1 If R < Y/2, then R = MOD(X,Y) = REM(X,Y). Go to #
9751 # 5.2 If R > Y/2, then { set Last_Subtract := true, #
9754 # then { Q := Q + 1, signX := -signX }. #
9931 #..If Carry is set, then Y < (Carry,D1,D2) < 2Y. Otherwise, Carry = 0
10354 # checking the exception bit. if one did occur, then we #
11384 # then a potential bug. to begin with, only the dyadic functions
11628 # normalized then we really don't need to go through this scaling. but for now,
11665 # extended precision. if the original operation was extended, then we have this
11668 # of this operation then has its exponent scaled by -0x6000 to create the
11704 # - if precision is extended, then we have the EXOP. simply bias the exponent
11776 # extended precision. if the original operation was extended, then we have this
11779 # of this operation then has its exponent scaled by -0x6000 to create the
11785 # for fun, let's use only extended precision, round to zero. then, let
11824 # if the rnd mode is anything but RZ, then we have to re-do the above
12212 # if underflow or inexact is enabled, then go calculate the EXOP first.
12780 # dst INF is set, then then j-bit of the result INF is also set).
13228 # here. For norms, load the rounding mode/prec, execute a "fint", then #
13335 # then store the resulting FPSR bits. #
13863 # If you have a 2 DENORMs, then you can just force the j-bit to a one
13867 # If you have a DENORM and a NORM with opposite signs, then use fcmp_norm, also.
14638 # occur. Then, check result exponent to see if exception would have #
15091 # occur. Then, check result exponent to see if exception would have #
15666 # the exponent is 3fff or 3ffe. if it's 3ffe, then it's a safe number
15870 # plus two, then set the smallest exponent to a very small value as a #
15986 # of the difference between the original and new exponent. Then, #
16113 # of the difference between the original and new exponent. Then, #
16167 # nonsignalling NAN, then that NAN is returned as the result. If both #
16168 # operands are nonsignalling NANs, then the destination operand #
16171 # then, the SNAN bit is set in the FPSR EXC byte. If the SNAN trap #
16172 # enable bit is set in the FPCR, then the trap is taken and the #
16174 # then the SNAN is converted to a nonsignalling NAN (by setting the #
16274 # the stacked fdbcc instruction opcode and then branches to a routine #
16275 # for that predicate. The corresponding fbcc instruction is then used #
16281 # enabled BSUN should not be flagged and the predicate is true, then #
16851 # (2) if (cr == -1) then
16903 # the stacked ftrapcc instruction opcode and then branches to a routine #
16904 # for that predicate. The corresponding fbcc instruction is then used #
16910 # enabled BSUN should not be flagged and the predicate is true, then #
17475 # the stacked fscc instruction opcode and then branches to a routine #
17476 # for that predicate. The corresponding fbcc instruction is then used #
17482 # enabled BSUN should not be flagged and the predicate is true, then #
18090 # then the address registers have not been updated.
18108 # fails then don't update the address register. if write passes then
18126 # fails then don't update the address register. if the write passes then
18200 # then we return the size of the dump and the string to the caller #
18219 # If the data register holds a zero, then the #
18244 # if the bit string is a zero, then the operation is a no-op
19599 # If the instruction is opclass two (memory->reg), then fetch #
19800 # (3) if (b || w || l) then simply read in #
19801 # if (s || d || x) then check for SNAN,UNNORM,DENORM #
19802 # if (packed) then punt for now #
20200 # precision. Then, bindec() is called to create the appropriate #
20203 # to-memory routines, then a special exit must be made so that the #
20500 # so, denorm and round and then use generic store single routine to
20605 # (3) if exp still equals zero, then insert original exponent
20607 # if exp now equals one, then it overflowed so call ovf_res.
20729 # so, denorm and round and then use generic store double routine to
20816 # (3) if exp still equals zero, then insert original exponent
20818 # if exp now equals one, then it overflowed so call ovf_res.
21356 # For a7, if the increment amount is one, then we have to #
21420 # For a7, if the decrement amount is one, then we have to #
22057 # If (G,R,S == 0) then result is exact and round is done, else set
22083 # If sign of fp number = 0 (positive), then add 1 to l. #
22087 bmi.w truncate # if positive then truncate
22100 # If sign of fp number = 1 (negative), then add 1 to l. #
22104 bpl.w truncate # if negative then truncate
22117 # If (g=1), then add 1 to l and if (r=s=0), then clear l #
22122 bcc.w truncate # if (g=1) then
22699 # according to the scale factor passed in d0. Then, round the #
22938 # get_packed(): fetch a packed operand from memory and then #
22957 # Then, fetch the operand from memory. If the fetch fails, exit #
23159 # get the integer digit then skip down & get the rest of the
23179 # then inc d1 (=2) to point to the next long word and reset d3 to 0
23242 # routine is necessary. If so, then check the sign of the exponent
23433 # same sign. If the exp was pos then multiply fp1*fp0;
24619 # -(an)+ register gets returned to its pre-exception value and then #
24725 # handler, then AN must be returned to its pre-instruction value.
24777 # mode, then also also wasn't updated. if it was user mode, then
Indexes created Thu Oct 23 22:10:10 GMT 2025