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79 # This is the exit point for the 060FPSP when an enabled overflow exception
81 # for enabled overflow conditions. The exception stack frame is an overflow
84 # The sample routine below simply clears the exception status bit and
97 # This is the exit point for the 060FPSP when an enabled underflow exception
99 # for enabled underflow conditions. The exception stack frame is an underflow
102 # The sample routine below simply clears the exception status bit and
115 # This is the exit point for the 060FPSP when an enabled operand error exception
117 # for enabled operand error exceptions. The exception stack frame is an operand error
121 # The sample routine below simply clears the exception status bit and
134 # This is the exit point for the 060FPSP when an enabled signalling NaN exception
136 # for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN
140 # The sample routine below simply clears the exception status bit and
153 # This is the exit point for the 060FPSP when an enabled divide-by-zero exception
155 # for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero
159 # The sample routine below simply clears the exception status bit and
172 # This is the exit point for the 060FPSP when an enabled inexact exception
174 # for enabled inexact exceptions. The exception stack frame is an inexact
178 # The sample routine below simply clears the exception status bit and
191 # This is the exit point for the 060FPSP when an enabled bsun exception
193 # for enabled bsun exceptions. The exception stack frame is a bsun
196 # The sample routine below clears the exception status bit, clears the NaN
214 # This is the exit point for the 060FPSP when an F-Line Illegal exception is 
215 # encountered. Three different types of exceptions can enter the F-Line exception
228 # This is the exit point for the 060FPSP when an FPU disabled exception is 
229 # encountered. Three different types of exceptions can enter the F-Line exception
235 # The sample code below enables the FPU, sets the PC field in the exception stack
236 # frame to the PC of the instruction causing the exception, and does an "rte".
256 # system handler for the trap exception vector number 7.