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598 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
599 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
623 # exception is enabled or disabled in the FPCR. For the disabled case, #
626 # then stored in either the FP regfile, data regfile, or memory. #
683 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
693 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
727 # traps are enabled or disabled.
838 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
839 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
863 # exception is enabled or disabled in the FPCR. For the disabled case, #
866 # then stored in either the FP regfile, data regfile, or memory. #
921 btst &0x5,1+EXC_CMDREG(%a6) # is op monadic or dyadic?
936 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
1035 # But, whether bogus or not, if inexact is enabled AND it occurred,
1113 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
1114 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
1150 # Two main instruction types can enter here: (1) DENORM or UNNORM #
1151 # unimplemented data types. These can be either opclass 0,2 or 3 #
1153 # also of opclasses 0,2, or 3. #
1174 # _fpsp_done() or through _real_trace() if a Trace exception is pending #
1178 # _real_unfl(), or _real_ovfl() as appropriate. PACKED opclass 3 #
1223 btst &0x5,EXC_SR(%a6) # user or supervisor mode?
1229 # if the exception is an opclass zero or two unimplemented data type
1270 # precision format if the src format was single or double and the
1271 # source data type was an INF, NAN, DENORM, or UNNORM
1275 # we don't know whether the src operand or the dst operand (or both) is the
1276 # UNNORM or DENORM. call the function that tags the operand type. if the
1277 # input is an UNNORM, then convert it to a NORM, DENORM, or ZERO.
1282 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
1291 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
1302 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
1339 cmpi.b %d0,&0x38 # is instr fcmp or ftst?
1366 # save the result in the proper fp reg (unless the op is fcmp or ftst);
1385 # * this is the case where we must call _real_inex() now or else
1409 bsr.l funimp_skew # skew sgl or dbl inputs
1436 # or double precision denorm, inf, or nan, the operand needs to be
1466 or.w %d0,LOCAL_EX(%a0) # insert new exponent
1498 or.w %d0,LOCAL_EX(%a0) # insert new exponent
1524 # the src can ONLY be a DENORM or an UNNORM! so, don't make any big subroutine
1567 # on extended precision opclass three instructions using pre-decrement or
1742 mov.l %a0,%usp # to or not...
1767 # frame or it will get overwritten when the exc stack frame is shifted "down".
1836 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
1847 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
1884 cmpi.b %d0,&0x38 # is instr fcmp or ftst?
1892 btst &0x5,EXC_SR(%a6) # user or supervisor?
1944 # save the result in the proper fp reg (unless the op is fcmp or ftst);
1963 # * this is the case where we must call _real_inex() now or else
1973 cmpi.b %d0,&0x6 # is exception INEX? (6 or 7)
1989 btst &0x5,EXC_SR(%a6) # user or supervisor?
2092 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
2123 btst &0x5,EXC_SR(%a6) # user or supervisor?
2307 # have to make sure that for single or double source operands that the
2384 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
2385 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
2412 # (1) FP Instructions using extended precision or packed immediate #
2415 # (3) The "fmovm.l" instruction w/ 2 or 3 control registers. #
2425 # FPU before exiting. In either the enabled or disabled cases, we #
2514 btst &0xa,%d0 # is src fmt x or p?
2538 # The packed operand is an INF or a NAN if the exponent field is all ones.
2540 cmpi.w %d0,&0x7fff # INF or NAN?
2541 beq.b iea_op_setsrc # operand is an INF or NAN
2571 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
2589 # the operation is fsincos, ftst, or fcmp. only fcmp is dyadic
2619 # OPERR : all reg-reg or mem-reg operations that can normally operr
2632 # now, we save the result, unless, of course, the operation was ftst or fcmp.
2680 # or underflow that was disabled, then we have to force an overflow or
2746 btst &14,%d0 # ctrl or data reg
2751 btst &0x5,EXC_SR(%a6) # user or supervisor mode
2983 # the instruction is a fmovm.l with 2 or 3 registers.
3043 btst &0x5,(%sp) # user or supervisor mode?
3105 # operr result out to memory or data register file as it should. #
3141 # this would be the case for opclass two operations with a source infinity or
3142 # denorm operand in the sgl or dbl format. NANs also become skewed, but can't
3166 # operand and save the appropriate minimum or maximum integer value
3180 # the operand is either an infinity or a QNAN.
3276 # _calc_ea_fout() - fix An if <ea> is -() or ()+; also get <ea> #
3295 # SNAN result out to memory or data register file as it should. #
3303 # if the effective addressing mode was -() or ()+, then the address #
3337 # this would be the case for opclass two operations with a source infinity or
3338 # denorm operand in the sgl or dbl format. NANs also become skewed and must be
3364 # operand and save the appropriate minimum or maximum integer value
3443 or.l %d1,%d0 # create sgl SNAN
3458 or.l %d1,%d0 # create sgl SNAN
3472 or.l %d1,FP_SCR0_EX(%a6) # create dbl hi
3479 or.l %d1,FP_SCR0_HI(%a6) # create dbl lo
3490 # for extended precision, if the addressing mode is pre-decrement or
3572 # store_fpreg() - store opclass 0 or 2 result to FP regfile #
3573 # unnorm_fix() - change UNNORM operands to NORM or ZERO #
3597 # inexact result out to memory or data register file as it should. #
3665 btst &0x5,1+EXC_CMDREG(%a6) # is operation monadic or dyadic?
3678 bsr.l unnorm_fix # yes; convert to NORM,DENORM,or ZERO
3801 # in the sgl or dbl format.
3840 # can occur because then FPU is disabled or the instruction is to be #
3901 or.w %d1,%d0 # concat mode,reg
3935 cmpi.b %d0,&0xc # is opsize ext or packed?
4263 # (1): postincrement or control addressing mode #
4299 btst &0x5,EXC_EXTWORD(%a6) # is it a move in or out?
4306 btst &0x4,EXC_EXTWORD(%a6) # control or predecrement?
4316 btst &0x5,EXC_SR(%a6) # user or supervisor mode?
4534 # or control bit string.
4978 btst &0xb,%d2 # is it word or long?
5074 btst &0xb,%d2 # is index word or long?
5118 btst &0xb,%d5 # is index word or long?
5199 btst &0x2,%d5 # pre or post indexing?
5414 # DST exponent was scaled by. If the SRC exponent is greater or equal, #
5465 or.w %d1,%d0 # concat {sgn,new exp}
5501 or.w %d1,%d0 # concat {sgn,new exp}
5547 or.w &0x3fff,%d0 # insert new operand's exponent(=0)
5603 btst &0x0,%d1 # is exp even or odd?
5625 btst &0x0,%d0 # is exp even or odd?
5674 or.w &0x3fff,%d0 # insert new operand's exponent(=0)
5743 or.l &nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
5749 or.l &nan_mask, USER_FPSR(%a6)
5753 or.l &nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
5761 or.l &aiop_mask+snan_mask, USER_FPSR(%a6)
5763 or.l &nan_mask, USER_FPSR(%a6)
5767 or.l &neg_mask, USER_FPSR(%a6)
5796 or.l &nan_mask+operr_mask+aiop_mask, USER_FPSR(%a6)
5956 or.b %d2, 3+FTEMP_LO2(%a6)
6006 # subtle step here; or in the g,r,s at the bottom of FTEMP_LO to minimize
6010 or.b %d2, 3+FTEMP_LO2(%a6)
6188 or.w &inx2a_mask, 2+USER_FPSR(%a6) # set inex2/ainex
6355 bne.b ext_grs_not_ext # no; go handle sgl or dbl
6388 and.l &0x0000003f, %d2 # s bit is the or of all other
6413 and.l &0x000001ff, %d2 # s bit is the or-ing of all
6463 or.l %d3, %d0 # create hi(man)
6492 # unnorm_fix(): - changes an UNNORM to one of NORM, DENORM, or ZERO #
6505 # d0 = optype tag - is corrected to one of NORM, DENORM, or ZERO #
6506 # a0 = input operand has been converted to a norm, denorm, or #
6542 or.w %d0, %d1 # {sgn,new exp}
6816 # d0.b = result FPSR_cc which caller may or may not want to save #
6990 or.b %d0,%d1 # concat the two
6998 or.b %d0, %d1 # insert rnd mode
7000 or.b %d0, %d1 # insert rnd prec
7061 # fout(): move from fp register to memory or data register #
7083 # fp0 : intermediate underflow or overflow result if #
7084 # OVFL/UNFL occurred for a sgl or dbl operand #
7090 # it's b,w,l,s,d,x, or p in size. b,w,l can be stored to either a data #
7091 # register or memory. The algorithm uses a standard "fmove" to create #
7094 # For sgl or dbl precision, overflow or underflow can occur. If #
7101 # word or a data register. The <ea> must be fixed as w/ extended #
7132 # is either a DENORM or a NORM.
7146 or.w %d1,2+USER_FPSR(%a6) # save new exc,accrued bits
7178 # is either a DENORM or a NORM.
7192 or.w %d1,2+USER_FPSR(%a6) # save new exc,accrued bits
7224 # is either a DENORM or a NORM.
7238 or.w %d1,2+USER_FPSR(%a6) # save new exc,accrued bits
7271 # is either a DENORM or a NORM.
7292 # in the pre-decrement case from supervisor mode or else we'll corrupt
7311 andi.b &0x0a,%d0 # is UNFL or INEX enabled?
7333 or.w %d0,FP_SCR0_EX(%a6) # insert new exponent
7351 # would cause either an underflow or overflow. these cases are handled
7379 or.w %d1,2+USER_FPSR(%a6) # set possible inex2/ainex
7448 andi.b &0x0a,%d1 # is UNFL or INEX enabled?
7498 andi.b &0x0a,%d1 # is UNFL or INEX enabled?
7589 # would cause either an underflow or overflow. these cases are handled
7617 or.w %d0,2+USER_FPSR(%a6) # set possible inex2/ainex
7669 andi.b &0x0a,%d1 # is UNFL or INEX enabled?
7709 andi.b &0x0a,%d1 # is UNFL or INEX enabled?
7795 or.l %d1,%d0 # put these bits in ms word of double
7804 or.l %d0,%d1 # put them in double result
7861 or.l %d1,%d0 # put these bits in ms word of single
7873 btst &0x4,EXC_CMDREG(%a6) # static or dynamic?
8025 or.b STAG(%a6),%d1 # combine src tags
8074 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8084 or.w %d2,%d1 # concat old sign,new exp
8096 # - if overflow or inexact is enabled, we need a multiply result rounded to
8098 # result. if the original operation was single or double, we have to do another
8114 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8118 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8121 andi.b &0x13,%d1 # is OVFL or INEX enabled?
8130 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
8137 # with an extra -0x6000. if the precision is single or double, we need to
8143 bne.b fmul_ovfl_ena_sd # it's sgl or dbl
8156 or.w %d2,%d1 # concat old sign,new exp
8192 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8207 # - if overflow or inexact is enabled, we need a multiply result rounded to
8209 # result. if the original operation was single or double, we have to do another
8230 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8233 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
8242 or.b %d0,FPSR_CC(%a6) # unf_res2 may have set 'Z'
8254 bne.b fmul_unfl_ena_sd # no, sgl or dbl
8276 or.w %d2,%d1 # concat old sign,new exp
8303 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8312 # we don't know if the result was an underflow that rounded up to a 2 or
8411 mov.b SRC_EX(%a0),%d0 # exclusive or the signs
8435 mov.b SRC_EX(%a0),%d0 # exclusive or the signs
8452 mov.b SRC_EX(%a0),%d0 # exclusive or the signs
8486 # or ovf_res() to return the default result. Also return EXOP if #
8515 bne.w fin_not_ext # no, so go handle dbl or sgl
8519 # or overflow because of rounding to the correct precision. so...
8535 bne.w fin_not_ext # no, so go handle dbl or sgl
8563 or.w %d1,%d0 # concat new exo,old sign
8569 # operand is to be rounded to single or double precision
8591 # operand will NOT overflow or underflow when moved into the fp reg file
8602 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8612 or.w %d1,%d2 # concat old sign,new exponent
8644 # if underflow or inexact is enabled, then go calculate the EXOP first.
8647 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
8654 or.b %d0,FPSR_CC(%a6) # unf_res may have set 'Z'
8659 # operand will underflow AND underflow or inexact is enabled.
8674 or.w %d1,%d2 # concat old sign,new exp
8692 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8695 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8698 andi.b &0x13,%d1 # is OVFL or INEX enabled?
8710 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
8728 or.w %d2,%d1
8746 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8843 or.b STAG(%a6),%d1 # combine src tags
8888 or.l %d1,USER_FPSR(%a6) # save INEX2,N
8898 or.w %d2,%d1 # concat old sign,new exp
8926 or.l %d0,USER_FPSR(%a6) # save INEX,N
8938 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8941 andi.b &0x13,%d1 # is OVFL or INEX enabled?
8949 or.b %d0,FPSR_CC(%a6) # set INF if applicable
8956 bne.b fdiv_ovfl_ena_sd # no, do sgl or dbl
8969 or.w %d2,%d1 # concat old sign,new exp
9000 or.l %d1,USER_FPSR(%a6) # save INEX2,N
9003 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
9012 or.b %d0,FPSR_CC(%a6) # 'Z' may have been set
9024 bne.b fdiv_unfl_ena_sd # no, sgl or dbl
9044 or.w %d2,%d1 # concat old sign,new exp
9071 or.l %d1,USER_FPSR(%a6) # save INEX2,N
9081 # or a normalized number that rounded down to a 1. so, redo the entire
9177 mov.b DST_EX(%a1),%d1 # or of input signs.
9209 # The destination was an INF w/ an In Range or ZERO source, the result is
9288 bne.w fneg_not_ext # no; go handle sgl or dbl
9292 # or overflow because of rounding to the correct precision. so...
9312 bne.b fneg_not_ext # no; go handle sgl or dbl
9343 or.w %d1,%d0 # concat old sign, new exponent
9349 # operand is either single or double
9371 # operand will NOT overflow or underflow when moved in to the fp reg file
9382 or.l %d1,USER_FPSR(%a6) # save INEX2,N
9392 or.w %d1,%d2 # concat old sign,new exp
9424 # if underflow or inexact is enabled, go calculate EXOP first.
9427 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
9434 or.b %d0,FPSR_CC(%a6) # unf_res may have set 'Z'
9454 or.w %d2,%d1 # concat new sign,new exp
9472 or.l %d1,USER_FPSR(%a6) # save INEX2,N
9475 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
9478 andi.b &0x13,%d1 # is OVFL or INEX enabled?
9490 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
9508 or.w %d2,%d1 # concat sign,exp
9526 or.l %d1,USER_FPSR(%a6) # save INEX2,N
9663 # norms. Denorms are so low that the answer will either be a zero or a #
9688 or.l %d0,USER_FPSR(%a6) # set exception bits
9709 # for DENORMs, the result will be either (+/-)ZERO or (+/-)1.
9711 # so, we could either set these manually or force the DENORM
9769 # norms. Denorms are so low that the answer will either be a zero or a #
9790 or.l %d0,USER_FPSR(%a6) # set exception bits
9813 # so, we could either set these manually or force the DENORM
9881 # exponent would take an exception. If so, use unf_res() or ovf_res() #
9911 bne.b fabs_not_ext # no; go handle sgl or dbl
9915 # or overflow because of rounding to the correct precision. so...
9961 or.w %d1,%d0 # concat old sign, new exponent
9967 # operand is either single or double
9989 # operand will NOT overflow or underflow when moved in to the fp reg file
10000 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10010 or.w %d1,%d2 # concat old sign,new exp
10040 # if underflow or inexact is enabled, go calculate EXOP first.
10042 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
10049 or.b %d0,FPSR_CC(%a6) # set possible 'Z' ccode
10069 or.w %d2,%d1 # concat new sign,new exp
10087 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10090 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
10093 andi.b &0x13,%d1 # is OVFL or INEX enabled?
10105 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
10123 or.w %d2,%d1 # concat sign,exp
10141 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10202 or.b STAG(%a6),%d1
10283 # 'N' bit for a negative QNAN or SNAN input so we must squelch it here.
10297 # If you have a DENORM and an INF or ZERO, just force the DENORM's j-bit to a one
10301 # (1) signs are (+) and the DENORM is the dst or
10406 or.b STAG(%a6),%d1
10445 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10455 or.w %d2,%d1 # concat old sign,new exp
10472 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10477 or.l &ovfl_inx_mask, USER_FPSR(%a6) # set ovfl/aovfl/ainex
10480 andi.b &0x13,%d1 # is OVFL or INEX enabled?
10489 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
10504 or.w %d2,%d1 # concat old sign,new exp
10521 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10543 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10546 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
10555 or.b %d0,FPSR_CC(%a6) # 'Z' bit may have been set
10581 or.w %d2,%d1 # concat old sign,new exp
10598 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10607 # we don't know if the result was an underflow that rounded up to a 2 or
10747 or.b STAG(%a6),%d1 # combine src tags
10792 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10802 or.w %d2,%d1 # concat old sign,new exp
10819 or.l %d1,USER_FPSR(%a6) # save INEX,N
10830 or.w &ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
10833 andi.b &0x13,%d1 # is OVFL or INEX enabled?
10842 or.b %d0,FPSR_CC(%a6) # set INF if applicable
10857 or.w %d2,%d1 # concat old sign,new exp
10876 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10879 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
10888 or.b %d0,FPSR_CC(%a6) # 'Z' bit may have been set
10914 or.w %d2,%d1 # concat old sign, new exp
10934 or.l %d1,USER_FPSR(%a6) # save INEX2,N
10944 # or a normalized number that rounded down to a 1. so, redo the entire
11094 or.b STAG(%a6),%d1 # combine src tags
11115 or.l %d1,USER_FPSR(%a6) # save exc and ccode bits
11140 or.w %d2,%d1 # concat sign,new exp
11163 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
11166 andi.b &0x13,%d1 # is OVFL or INEX enabled?
11175 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
11183 bne.b fadd_ovfl_ena_sd # no; prec = sgl or dbl
11190 or.w %d2,%d1 # concat sign,new exp
11226 or.l %d1,USER_FPSR(%a6) # save INEX,N
11229 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
11238 or.b %d0,FPSR_CC(%a6) # 'Z' bit may have been set
11248 bne.b fadd_unfl_ena_sd # no; sgl or dbl
11267 or.w %d2,%d1 # concat sign,new exp
11305 # rounded "up" or a normalized number rounded "down".
11307 # seeing if the new result is smaller or equal to the current result.
11407 # the signs are the same. so determine whether they are positive or negative
11409 tst.b %d0 # are ZEROes positive or negative?
11417 # - therefore, we return +ZERO if the rounding modes are RN,RZ, or RP.
11435 # one operand is a ZERO and the other is a DENORM or NORM. scale
11436 # the DENORM or NORM and jump to the regular fadd routine.
11463 mov.b SRC_EX(%a0),%d0 # exclusive or the signs
11547 or.b STAG(%a6),%d1 # combine src tags
11568 or.l %d1,USER_FPSR(%a6) # save exc and ccode bits
11593 or.w %d2,%d1 # insert new exponent
11616 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
11619 andi.b &0x13,%d1 # is OVFL or INEX enabled?
11628 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
11643 or.w %d2,%d1 # concat sign,exp
11679 or.l %d1,USER_FPSR(%a6)
11682 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
11691 or.b %d0,FPSR_CC(%a6) # 'Z' may have been set
11720 or.w %d2,%d1 # concat sgn,exp
11758 # rounded "up" or a normalized number rounded "down".
11760 # seeing if the new result is smaller or equal to the current result.
11869 # - therefore, we return +ZERO if the rounding mode is RN,RZ, or RP
11887 # one operand is a ZERO and the other is a DENORM or a NORM.
11888 # scale the DENORM or NORM and jump to the regular fsub routine.
11915 mov.b SRC_EX(%a0),%d0 # exclusive or the signs
12000 bne.b fsqrt_not_ext # no; go handle sgl or dbl
12008 or.l %d1,USER_FPSR(%a6) # set N,INEX
12017 bne.b fsqrt_not_ext # no; go handle sgl or dbl
12028 # operand is either single or double
12052 # operand will NOT overflow or underflow when moved in to the fp reg file
12063 or.l %d1,USER_FPSR(%a6) # save INEX2,N
12073 or.w %d1,%d2 # concat old sign,new exp
12098 # the exponent is 3fff or 3ffe. if it's 3ffe, then it's a safe number
12118 or.l %d1,USER_FPSR(%a6) # save INEX2,N
12120 # if underflow or inexact is enabled, go calculate EXOP first.
12122 andi.b &0x0b,%d1 # is UNFL or INEX enabled?
12131 or.b %d0,FPSR_CC(%a6) # set possible 'Z' ccode
12151 or.w %d2,%d1 # concat new sign,new exp
12169 or.l %d1,USER_FPSR(%a6) # save INEX2,N
12172 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
12175 andi.b &0x13,%d1 # is OVFL or INEX enabled?
12187 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
12205 or.w %d2,%d1 # concat sign,exp
12226 or.l %d1,USER_FPSR(%a6) # save INEX2,N
12258 tst.b SRC_EX(%a0) # is ZERO positive or negative?
12270 tst.b SRC_EX(%a0) # is INF positive or negative?
12846 # value in d0. The FP number can be DENORM or SNAN so we have to be #
12917 # frame w/ maybe a correction factor if the <ea> is -(an) or (an)+. #
12920 # If the packed operand is a ZERO,NAN, or INF, convert it to #
12940 # The packed operand is an INF or a NAN if the exponent field is all ones.
12942 cmpi.w %d0,&0x7fff # INF or NAN?
12944 rts # operand is an INF or NAN
13016 # Clean up and return. Check if the final mul or div was inexact. #
13089 or
13090 or.l &0x40000000,(%a0) # and in working bcd
13185 # of 27 or less are exact, there is no need to use this routine to
13204 # and do append (+) or strip (-) zeros accordingly.
13240 or.l &0x40000000,%d4 # and set SE in d4
13241 or.l &0x40000000,(%a0) # and in memory
13379 or.l &0x40000000,(%a0) # and set SE bit
13436 # the input may be either normalized, unnormalized, or #
13448 # input. If input is unnormalized or denormalized, #
13469 # if it is a positive number, or the number of digits #
13495 # A10. Or in INEX. #
13497 # compensated for by 'or-ing' in the INEX2 flag to #
13510 # or less than LEN -1 digits, adjust ILOG and repeat from #
13696 # a positive number, or the number of digits after the
13739 or.l &opaop_mask,USER_FPSR(%a6) # set OPERR & AIOP in USER_FPSR
13777 # d2: x/0 or 24 for A9
13781 # d6: ILOG/ILOG or k if ((k<=0)&(ILOG<k))
13880 # d2: 0 or 24/unchanged
13930 or.w %d3,(%sp) # insert new exponent
13961 # A10. Or in INEX.
13963 # for by 'or-ing' in the INEX2 flag to the lsb of Y.
13987 or.l &1,8(%a2) # or in 1 to lsb of mantissa
14036 or.l &0x80000000,(%a0) # if neg, use -Y
14048 or.w %d0,FPSR_EXCEPT(%a6)
14051 ## or.w %d0,FPSR_EXCEPT(%a6)
14065 # or less than LEN -1 digits, adjust ILOG and repeat from
14279 fbeq.w den_zero # if zero, use k-factor or 4933
14329 or.l &opaop_mask,USER_FPSR(%a6) # set OPERR & AIOP in USER_FPSR
14505 or.l %d6,%d2 # or in msbs from d3 into d2
14674 btst &0x5,(%sp) # supervisor or user mode?
14683 # if the effective addressing mode was predecrement or postincrement,
14741 cmpi.b EXC_VOFF(%a6),&0x30 # move in or out?
14744 btst &0x5,EXC_SR(%a6) # user or supervisor?
Indexes created Thu Oct 23 22:10:10 GMT 2025