OpenGrok

320 set EXC_A6,		EXC_AREGS+(6*4)		# offset of saved a6
650 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
652 	fsave		FP_SRC(%a6)		# grab the "busy" frame
654  	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
655 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
656  	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
659 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
660 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
661 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
663 	mov.l		%d0,EXC_OPWORD(%a6)
667 	btst		&0x5,EXC_CMDREG(%a6)	# is instr an fmove out?
671 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
676 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
678 	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM
683 	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
686 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
689 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
695 	mov.b		%d0,DTAG(%a6)		# save dst optype tag
699 #$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
700 #$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
701 #$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
702 #$#	mov.l		FP_DST_EX(%a6),TRAP_DSTOP_EX(%a6)
703 #$#	mov.l		FP_DST_HI(%a6),TRAP_DSTOP_HI(%a6)
704 #$#	mov.l		FP_DST_LO(%a6),TRAP_DSTOP_LO(%a6)
707 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode
709 	mov.b		1+EXC_CMDREG(%a6),%d1
712 	andi.l		&0x00ff01ff,USER_FPSR(%a6) # zero all but accured field
717 	lea		FP_SRC(%a6),%a0
718 	lea		FP_DST(%a6),%a1
728 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
734 	btst		&ovfl_bit,FPCR_ENABLE(%a6)
737 	btst		&inex2_bit,FPCR_ENABLE(%a6)
740 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
741 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
742 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
744 	unlk		%a6
751 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP (fp1) to stack
753 	mov.w		&0xe005,2+FP_SRC(%a6) 	# save exc status
755 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
756 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
757 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
759 	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!
761 	unlk		%a6
769 	fmovm.x		&0x40,FP_SRC(%a6) 	# save EXOP (fp1) to stack
771 	mov.b		&0xc4,1+EXC_VOFF(%a6)	# vector offset = 0xc4
772 	mov.w		&0xe001,2+FP_SRC(%a6) 	# save exc status
774 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
775 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
776 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
778 	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!
780 	unlk		%a6
788 #$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
789 #$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
790 #$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
793 	mov.b		&NORM,STAG(%a6)		# set src optype tag
796 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode
798 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero all but accured field
803 	lea		FP_SRC(%a6),%a0		# pass ptr to src operand
807 	btst		&ovfl_bit,FPCR_ENABLE(%a6)
810 	btst		&inex2_bit,FPCR_ENABLE(%a6)
813 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
814 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
815 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
817 	unlk		%a6
890 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
892 	fsave		FP_SRC(%a6)		# grab the "busy" frame
894  	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
895 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
896  	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
899 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)	
900 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
901 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
903 	mov.l		%d0,EXC_OPWORD(%a6)
907 	btst		&0x5,EXC_CMDREG(%a6)	# is instr an fmove out?
911 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
914 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
916 	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM
921 	btst		&0x5,1+EXC_CMDREG(%a6)	# is op monadic or dyadic?
926 	btst		&0x4,1+EXC_CMDREG(%a6)	# is op an fsincos?
929 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
932 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
938 	mov.b		%d0,DTAG(%a6)		# save dst optype tag
942 #$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
943 #$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
944 #$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
945 #$#	mov.l		FP_DST_EX(%a6),TRAP_DSTOP_EX(%a6)
946 #$#	mov.l		FP_DST_HI(%a6),TRAP_DSTOP_HI(%a6)
947 #$#	mov.l		FP_DST_LO(%a6),TRAP_DSTOP_LO(%a6)
950 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode
952 	mov.b		1+EXC_CMDREG(%a6),%d1
955 	andi.l		&0x00ff01ff,USER_FPSR(%a6)
960 	lea		FP_SRC(%a6),%a0
961 	lea		FP_DST(%a6),%a1
967 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
982 	btst		&unfl_bit,FPCR_ENABLE(%a6)
986 	btst		&inex2_bit,FPCR_ENABLE(%a6)
990 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
991 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
992 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
994 	unlk		%a6
1009 	btst		&unfl_bit,FPSR_EXCEPT(%a6)
1013 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP (fp1) to stack
1015 	mov.w		&0xe003,2+FP_SRC(%a6) 	# save exc status
1017 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
1018 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1019 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1021 	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!
1023 	unlk		%a6
1038 	btst		&inex2_bit,FPSR_EXCEPT(%a6)
1043 	fmovm.x		&0x40,FP_SRC(%a6) 	# save EXOP to stack
1045 	mov.b		&0xc4,1+EXC_VOFF(%a6)	# vector offset = 0xc4
1046 	mov.w		&0xe001,2+FP_SRC(%a6) 	# save exc status
1048 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
1049 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1050 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1052 	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!
1054 	unlk		%a6
1062 #$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
1063 #$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
1064 #$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
1067 	mov.b		&NORM,STAG(%a6)		# set src optype tag
1070 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode
1072 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero all but accured field
1077 	lea		FP_SRC(%a6),%a0		# pass ptr to src operand
1081 	btst		&unfl_bit,FPCR_ENABLE(%a6)
1084 	btst		&inex2_bit,FPCR_ENABLE(%a6)
1087 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
1088 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1089 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1091 	unlk		%a6
1215 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
1217 	fsave		FP_SRC(%a6)		# save fp state
1219  	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
1220 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
1221  	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
1223 	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode?
1227 	mov.l		%a0,EXC_A7(%a6)		# save on stack
1233 	lea		0x4+EXC_EA(%a6),%a0	# load old a7'
1234 	mov.l		%a0,EXC_A7(%a6)		# save on stack
1241 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
1242 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
1243 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
1245 	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD
1249 	clr.b		SPCOND_FLG(%a6)		# clear special condition flag
1253 	btst		&0x5,EXC_CMDREG(%a6)	# is it an fmove out?
1257 	bfextu		EXC_CMDREG(%a6){&0:&6},%d0
1264 	andi.l		&0x00ff00ff,USER_FPSR(%a6) # zero exception field
1272 	lea		FP_SRC(%a6),%a0		# pass ptr to input
1278 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
1285 	mov.b		%d0,STAG(%a6)		# save src optype tag
1287 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
1291 	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
1293 	cmpi.b		1+EXC_CMDREG(%a6),&0x3a	# is operation an ftst?
1298 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
1304 	mov.b		%d0,DTAG(%a6)		# save dst optype tag
1308 	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec
1310 	bfextu		1+EXC_CMDREG(%a6){&1:&7},%d1 # extract extension
1312 	lea		FP_SRC(%a6),%a0
1313 	lea		FP_DST(%a6),%a1
1332 	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions set
1337 	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch extension
1342 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
1347 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1348 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1349 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1351 	unlk		%a6
1356 	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
1370 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
1374 	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
1399 	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did disabled underflow occur?
1401 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did disabled overflow occur?
1412 	mov.w		(tbl_except.b,%pc,%d0.w*2),2+FP_SRC(%a6) # create exc status
1414 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1415 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1416 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1418 	frestore	FP_SRC(%a6)		# restore src op
1420 	unlk		%a6
1441 	bfextu		EXC_CMDREG(%a6){&0:&6},%d0 # extract opclass,src fmt
1509 	bfextu		EXC_CMDREG(%a6){&3:&3},%d0
1519 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field
1526 	mov.w		FP_SRC_EX(%a6),%d0	# get exponent
1530 	lea		FP_SRC(%a6),%a0
1533 	mov.b		%d0,STAG(%a6)
1537 	mov.b		&DENORM,STAG(%a6)
1541 	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec
1543 	lea		FP_SRC(%a6),%a0		# pass ptr to src operand
1545 	mov.l		(%a6),EXC_A6(%a6)	# in case a6 changes
1560 	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
1565 	mov.l		EXC_A6(%a6),(%a6)	# in case a6 changed
1572 	btst		&0x5,EXC_SR(%a6)
1575 	mov.l		EXC_A7(%a6),%a0		# restore a7
1579 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1580 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1581 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1583 	unlk		%a6
1593 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
1601 	fmovm.x		&0x80,FP_SRC(%a6)	# put answer on stack
1603 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1604 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1605 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1607 	mov.l		(%a6),%a6		# restore frame pointer
1625 	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
1632 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
1636 	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
1686 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1687 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1688 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1690 	mov.w		&0x30d8,EXC_VOFF(%a6)	# vector offset = 0xd8
1691 	mov.w		&0xe006,2+FP_SRC(%a6)
1693 	frestore	FP_SRC(%a6)
1695 	unlk		%a6
1701 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1702 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1703 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1705 	mov.w		&0x30d0,EXC_VOFF(%a6)	# vector offset = 0xd0
1706 	mov.w		&0xe004,2+FP_SRC(%a6)
1708 	frestore	FP_SRC(%a6)
1710 	unlk		%a6
1716 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack
1718 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1719 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1720 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1722 	mov.w		&0x30d4,EXC_VOFF(%a6)	# vector offset = 0xd4
1723 	mov.w		&0xe005,2+FP_SRC(%a6)
1725 	frestore	FP_SRC(%a6)		# restore EXOP
1727 	unlk		%a6
1736 	mov.l		EXC_A6(%a6),(%a6)	# restore a6
1738 	btst		&0x5,EXC_SR(%a6)
1741 	mov.l		EXC_A7(%a6),%a0		# restore a7 whether we need
1745 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack
1747 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1748 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1749 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1751 	mov.w		&0x30cc,EXC_VOFF(%a6)	# vector offset = 0xcc
1752 	mov.w		&0xe003,2+FP_SRC(%a6)
1754 	frestore	FP_SRC(%a6)		# restore EXOP
1756 	unlk		%a6
1761 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # was the <ea> mode -(sp)?
1768 	fmovm.x		&0x80,FP_SRC(%a6)	# put answer on stack
1769 	fmovm.x		&0x40,FP_DST(%a6)	# put EXOP on stack
1771 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1772 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1773 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1775 	mov.w		&0x30cc,EXC_VOFF(%a6)	# vector offset = 0xcc
1776 	mov.w		&0xe003,2+FP_DST(%a6)
1778 	frestore	FP_DST(%a6)		# restore EXOP
1780 	mov.l		(%a6),%a6		# restore frame pointer
1797 	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack
1799 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1800 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1801 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1803 	mov.w		&0x30c4,EXC_VOFF(%a6)	# vector offset = 0xc4
1804 	mov.w		&0xe001,2+FP_SRC(%a6)
1806 	frestore	FP_SRC(%a6)		# restore EXOP
1808 	unlk		%a6
1820 	andi.l		&0x0ff00ff,USER_FPSR(%a6) # zero exception field
1827 	lea		FP_SRC(%a6),%a0		# pass ptr to src
1830 	mov.b		%d0,STAG(%a6)		# save src optype tag
1832 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
1836 	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
1838 	cmpi.b		1+EXC_CMDREG(%a6),&0x3a	# is operation an ftst?
1843 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
1849 	mov.b		%d0,DTAG(%a6)		# save dst optype tag
1853 	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec
1855 	bfextu		1+EXC_CMDREG(%a6){&1:&7},%d1 # extract extension
1857 	lea		FP_SRC(%a6),%a0
1858 	lea		FP_DST(%a6),%a1
1877 	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
1882 	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch extension
1887 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
1892 	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
1895 	mov.l		EXC_A7(%a6),%a0		# update user a7
1899 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1900 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1901 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1903 	unlk		%a6			# unravel stack frame
1914 	btst		&mia7_bit,SPCOND_FLG(%a6) # was ea mode (a7)+
1917 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1918 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
1919 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
1921 	unlk		%a6			# unravel stack frame
1934 	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled & set
1948 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
1952 	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
1977 	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did disabled underflow occur?
1979 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did disabled overflow occur?
1989 	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
1992 	mov.l		EXC_A7(%a6),%a0		# update user a7
1996 	mov.w		(tbl_except_p.b,%pc,%d0.w*2),2+FP_SRC(%a6)
1998 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
1999 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2000 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2002 	frestore	FP_SRC(%a6)		# restore src op
2004 	unlk		%a6
2024 a6)
2027 	mov.w		(tbl_except_p.b,%pc,%d0.w*2),2+FP_SRC(%a6)
2029 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2030 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2031 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2033 	frestore	FP_SRC(%a6)		# restore src op
2035 	unlk		%a6			# unravel stack frame
2078 	and.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field
2083 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
2088 	lea		FP_SRC(%a6),%a0
2095 	mov.b		%d0,STAG(%a6)		# save src optype tag
2098 	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec
2100 	lea		FP_SRC(%a6),%a0		# pass ptr to src operand
2102 	mov.l		(%a6),EXC_A6(%a6)	# in case a6 changes
2117 	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
2121 	mov.l		EXC_A6(%a6),(%a6)	# restore a6
2123 	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
2126 	mov.l		EXC_A7(%a6),%a0		# update user a7
2130 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2131 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2132 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2134 	unlk		%a6			# unravel stack frame
2145 	btst		&mda7_bit,SPCOND_FLG(%a6) # was ea mode -(a7)
2148 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2149 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2150 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2152 	mov.l		(%a6),%a6		# restore frame pointer
2170 	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
2174 	mov.l		EXC_A6(%a6),(%a6)	# restore a6
2184 	btst		&0x5,EXC_SR(%a6)
2187 	mov.l		EXC_A7(%a6),%a0
2192 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
2198 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2199 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2200 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2202 	mov.w		&0x30d8,EXC_VOFF(%a6)	# vector offset = 0xd0
2203 	mov.w		&0xe006,2+FP_SRC(%a6) 	# set fsave status
2205 	frestore	FP_SRC(%a6)		# restore src operand
2207 	mov.l		(%a6),%a6		# restore frame pointer
2224 	btst		&0x5,EXC_SR(%a6)
2227 	mov.l		EXC_A7(%a6),%a0
2232 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
2238 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2239 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2240 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2242 	mov.w		&0x30d0,EXC_VOFF(%a6)	# vector offset = 0xd0
2243 	mov.w		&0xe004,2+FP_SRC(%a6) 	# set fsave status
2245 	frestore	FP_SRC(%a6)		# restore src operand
2247 	mov.l		(%a6),%a6		# restore frame pointer
2264 	btst		&0x5,EXC_SR(%a6)
2267 	mov.l		EXC_A7(%a6),%a0
2272 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
2278 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
2279 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2280 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2282 	mov.w		&0x30c4,EXC_VOFF(%a6) 	# vector offset = 0xc4
2283 	mov.w		&0xe001,2+FP_SRC(%a6) 	# set fsave status
2285 	frestore	FP_SRC(%a6)		# restore src operand
2287 	mov.l		(%a6),%a6		# restore frame pointer
2312 	bfextu		EXC_EXTWORD(%a6){&3:&3},%d0 # extract src specifier
2320 	mov.w		FP_SRC_EX(%a6),%d0	# fetch DENORM exponent
2327 	mov.l		FP_SRC_HI(%a6),%d1	# fetch DENORM hi(man)
2330 	mov.l		%d1,FP_SRC_HI(%a6)	# insert new hi(man)
2331 	andi.w		&0x8000,FP_SRC_EX(%a6)	# clear old exponent
2332 	ori.w		&0x3f80,FP_SRC_EX(%a6)	# insert new "skewed" exponent
2337 	mov.w		FP_SRC_EX(%a6),%d0	# fetch DENORM exponent
2343 	tst.b		FP_SRC_EX(%a6)		# make "internal format"
2344 	smi.b		0x2+FP_SRC(%a6)
2345 	mov.w		%d0,FP_SRC_EX(%a6)	# insert exponent with cleared sign
2347 	lea		FP_SRC(%a6),%a0		# pass ptr to src op
2351 	tst.b		0x2+FP_SRC(%a6)		# is sign set?
2355 	bset		&0x7,FP_SRC_HI(%a6)	# set j-bit
2356 	mov.w		%d0,FP_SRC_EX(%a6)	# insert new exponent
2363 	btst		&0x5,EXC_SR(%a6)
2365 	mov.l		0x0(%a0),FP_DST_EX(%a6)
2366 	mov.l		0x4(%a0),FP_DST_HI(%a6)
2367 	mov.l		0x8(%a0),FP_DST_LO(%a6)
2473 	link		%a6,&-LOCAL_SIZE	# init stack frame
2475 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
2476 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
2477 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
2480 	mov.l		EXC_PC(%a6),EXC_EXTWPTR(%a6)
2482 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
2483 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
2485 	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD
2512 	andi.l		&0x00ff00ff,USER_FPSR(%a6)
2518 	mov.l		EXC_EXTWPTR(%a6),%a0	# pass: ptr to #<data>
2519 	lea		FP_SRC(%a6),%a1		# pass: ptr to super addr
2530 	mov.l		EXC_EXTWPTR(%a6),%a0	# pass: ptr to #<data>
2531 	lea		FP_SRC(%a6),%a1		# pass: ptr to super dst
2539 	bfextu		FP_SRC(%a6){&1:&15},%d0	# get exp
2545 	mov.b		3+FP_SRC(%a6),%d0	# get byte 4
2548 	tst.l		FP_SRC_HI(%a6)		# is lw 2 zero?
2550 	tst.l		FP_SRC_LO(%a6)		# is lw 3 zero?
2553 	lea		FP_SRC(%a6),%a0		# pass: ptr to packed op
2555 	fmovm.x		&0x80,FP_SRC(%a6)	# make this the srcop
2558 	addi.l		&0xc,EXC_EXTWPTR(%a6)	# update extension word pointer
2561 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
2563 	mov.b		%d0,STAG(%a6)		# could be ANYTHING!!!
2567 	mov.b		%d0,STAG(%a6)		# set new optype tag
2569 	clr.b		STORE_FLG(%a6)		# clear "store result" boolean
2571 	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
2573 	btst		&0x4,1+EXC_CMDREG(%a6)	# is operation fsincos,ftst,fcmp?
2577 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # fetch dst regno
2580 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
2582 	mov.b		%d0,DTAG(%a6)		# could be ANYTHING!!!
2586 	mov.b		%d0,DTAG(%a6)		# set new optype tag
2591 	btst		&0x3,1+EXC_CMDREG(%a6)	# is operation fsincos?
2595 	st		STORE_FLG(%a6)		# don't store a final result
2596 	btst		&0x1,1+EXC_CMDREG(%a6)	# is operation fcmp?
2601 	mov.b		FPCR_MODE(%a6),%d0	# pass: rnd mode,prec
2603 	mov.b		1+EXC_CMDREG(%a6),%d1
2609 	lea		FP_SRC(%a6),%a0
2610 	lea		FP_DST(%a6),%a1
2629 	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
2635 	tst.b		STORE_FLG(%a6)		# does this op store a result?
2639 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # fetch dst regno
2643 	mov.l		EXC_PC(%a6),USER_FPIAR(%a6) # set FPIAR to "Current PC"
2644 	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set "Next PC" in exc frame
2646 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
2647 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2648 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2650 	unlk		%a6			# unravel the frame
2658 	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enable and set
2664 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did overflow occur?
2668 	btst		&inex2_bit,FPCR_ENABLE(%a6) # is inexact enabled?
2682 	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did overflow occur?
2684 	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did underflow occur?
2688 	mov.w		(tbl_iea_except.b,%pc,%d0.w*2),2+FP_SRC(%a6)
2696 	mov.w		&0xe005,2+FP_SRC(%a6)
2700 	mov.w		&0xe003,2+FP_SRC(%a6)
2703 	mov.l		EXC_PC(%a6),USER_FPIAR(%a6) # set FPIAR to "Current PC"
2704 	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set "Next PC" in exc frame
2706 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
2707 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2708 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2710 	frestore 	FP_SRC(%a6)		# restore exceptional state
2712 	unlk		%a6			# unravel the frame
2751 	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode
2756 	mov.l		%a0,EXC_A7(%a6)		# store current a7	
2758 	mov.l		EXC_A7(%a6),%a0		# load possibly new a7
2763 	clr.b		SPCOND_FLG(%a6)
2764 	lea		0x2+EXC_VOFF(%a6),%a0
2765 	mov.l		%a0,EXC_A7(%a6)
2768 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
2770 	cmpi.b		SPCOND_FLG(%a6),&mia7_flg
2778 	btst		&0x7,EXC_SR(%a6)
2781 	mov.w		EXC_SR(%a6),(EXC_SR,%a6,%d0)
2782 	mov.l		EXC_EXTWPTR(%a6),(EXC_PC,%a6,%d0)
2783 	mov.w		&0x00f0,(EXC_VOFF,%a6,%d0)
2785 	lea		(EXC_SR,%a6,%d0),%a0
2786 	mov.l		%a0,EXC_SR(%a6)
2788 	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
2789 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2790  	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1
2792 	unlk		%a6
2797 	mov.w		EXC_SR(%a6),(EXC_SR-0x4,%a6,%d0)
2798 	mov.l		EXC_EXTWPTR(%a6),(EXC_PC-0x4,%a6,%d0)
2799 	mov.w		&0x2024,(EXC_VOFF-0x4,%a6,%d0)
2800 	mov.l		EXC_PC(%a6),(EXC_VOFF+0x2-0x4,%a6,%d0)
2802 	lea		(EXC_SR-0x4,%a6,%d0),%a0
2803 	mov.l		%a0,EXC_SR(%a6)
2805 	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
2806 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2807  	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1
2809 	unlk		%a6
2815 	mov.b		%d1,EXC_VOFF(%a6)	# store strg
2816 	mov.b		%d0,0x1+EXC_VOFF(%a6)	# store size
2818 	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
2819 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2820  	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1
2822 	mov.l		(%a6),-(%sp)		# make a copy of a6
2825 	mov.l		EXC_EXTWPTR(%a6),-(%sp)	# make a copy of Next PC
2828 	mov.b		0x1+EXC_VOFF(%a6),%d0	# fetch size
2831 	btst		&0x7,EXC_SR(%a6)	# is trace enabled?
2834 	mov.w		EXC_SR(%a6),(EXC_SR-0x4,%a6,%d0)
2835 	mov.l		EXC_PC(%a6),(EXC_VOFF-0x2,%a6,%d0)
2836 	mov.l		(%sp)+,(EXC_PC-0x4,%a6,%d0)
2837 	mov.w		&0x2024,(EXC_VOFF-0x4,%a6,%d0)
2839 	pea		(%a6,%d0)		# create final sp
2843 	mov.w		EXC_SR(%a6),(EXC_SR,%a6,%d0)
2844 	mov.l		(%sp)+,(EXC_PC,%a6,%d0)
2845 	mov.w		&0x00f0,(EXC_VOFF,%a6,%d0)
2847 	pea		(0x4,%a6,%d0)		# create final sp
2851 	mov.b		EXC_VOFF(%a6),%d1	# fetch strg
2855 	fmovm.x		&0x80,(0x4+0x8,%a6,%d0)
2860 	fmovm.x		&0x40,(0x4+0x8,%a6,%d0)
2865 	fmovm.x		&0x20,(0x4+0x8,%a6,%d0)
2870 	fmovm.x		&0x10,(0x4+0x8,%a6,%d0)
2875 	fmovm.x		&0x08,(0x4+0x8,%a6,%d0)
2880 	fmovm.x		&0x04,(0x4+0x8,%a6,%d0)
2885 	fmovm.x		&0x02,(0x4+0x8,%a6,%d0)
2890 	fmovm.x		&0x01,(0x4+0x8,%a6,%d0)
2894 	mov.l		0xc(%sp),%a6
2907 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
2908 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
2909 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
2911 	btst		&0x7,EXC_SR(%a6)	# is trace on?
2914 	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set Next PC
2916 	unlk		%a6			# unravel the frame
2939 # -restore a6 (not with unlk)
2940 # -shift stack frame down over where old a6 used to be
2943 	mov.l		(%a6),%a6		# restore frame pointer
2962 	link		%a6,&-LOCAL_SIZE	# init stack frame
2964 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
2967 	mov.l		EXC_PC(%a6),EXC_EXTWPTR(%a6)
2968 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
2969 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
2971 	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD
2997 	mov.l		EXC_EXTWPTR(%a6),%d0
2998 	sub.l		EXC_PC(%a6),%d0
3000 	mov.w		%d0,EXC_VOFF(%a6)	# store stack shift value
3002 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3004 	unlk		%a6
3028 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3029 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1 on stack
3031 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3033 	unlk		%a6
3051 	lea		-LOCAL_SIZE(%a6),%sp
3056 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1 on stack
3059 	mov.l		(%a6),%a6
3118 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
3120 	fsave		FP_SRC(%a6)		# grab the "busy" frame
3122  	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
3123 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
3124  	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
3127 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
3129 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
3130 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
3132 	mov.l		%d0,EXC_OPWORD(%a6)
3144 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
3148 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
3149 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3150 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3152 	frestore	FP_SRC(%a6)
3154 	unlk		%a6
3176 	mov.w		FP_SRC_EX(%a6),%d1	# fetch exponent
3181 	tst.l		FP_SRC_LO(%a6)
3183 	mov.l		FP_SRC_HI(%a6),%d1
3187 	mov.l		FP_SRC_HI(%a6),L_SCR1(%a6)
3192 	tst.b		FP_SRC_EX(%a6)
3196 	mov.l		%d1,L_SCR1(%a6)
3200 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract <ea> mode,reg
3215 	mov.b		L_SCR1(%a6),%d0		# load positive default result
3218 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3231 	mov.w		L_SCR1(%a6),%d0		# load positive default result
3234 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3247 	mov.l		L_SCR1(%a6),%d0		# load positive default result
3250 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3314 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
3316 	fsave		FP_SRC(%a6)		# grab the "busy" frame
3318  	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
3319 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
3320  	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
3323 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
3325 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
3326 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
3328 	mov.l		%d0,EXC_OPWORD(%a6)
3340 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
3344 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
3345 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3346 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3348 	frestore	FP_SRC(%a6)
3350 	unlk		%a6
3370 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract <ea> mode,reg
3385 	mov.b		FP_SRC_HI(%a6),%d0	# load upper byte of SNAN
3389 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3402 	mov.w		FP_SRC_HI(%a6),%d0	# load upper word of SNAN
3406 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3419 	mov.l		FP_SRC_HI(%a6),%d0	# load upper longword of SNAN
3423 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3438 	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
3441 	mov.l		FP_SRC_HI(%a6),%d1	# load mantissa
3444 	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
3452 	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
3456 	mov.l		FP_SRC_HI(%a6),%d1	# load mantissa
3465 	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
3468 	mov.l		FP_SRC_HI(%a6),%d1	# load hi mantissa
3469 	mov.l		%d0,FP_SCR0_EX(%a6)	# store to temp space
3472 	or.l		%d1,FP_SCR0_EX(%a6)	# create dbl hi
3473 	mov.l		FP_SRC_HI(%a6),%d1	# load hi mantissa
3476 	mov.l		%d1,FP_SCR0_HI(%a6)	# store to temp space
3477 	mov.l		FP_SRC_LO(%a6),%d1	# load lo mantissa
3479 	or.l		%d1,FP_SCR0_HI(%a6)	# create dbl lo
3480 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
3481 	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
3494 	clr.b		SPCOND_FLG(%a6)		# clear special case flag
3496 	mov.w		FP_SRC_EX(%a6),FP_SCR0_EX(%a6)
3497 	clr.w		2+FP_SCR0(%a6)
3498 	mov.l		FP_SRC_HI(%a6),%d0
3500 	mov.l		%d0,FP_SCR0_HI(%a6)
3501 	mov.l		FP_SRC_LO(%a6),FP_SCR0_LO(%a6)
3503 	btst		&0x5,EXC_SR(%a6)	# supervisor mode exception?
3507 	mov.l		%a0,EXC_A7(%a6)		# save on stack for calc_ea()
3508 	mov.l		(%a6),EXC_A6(%a6)
3512 	mov.l		%a0,EXC_EA(%a6)		# stack correct <ea>
3514 	mov.l		EXC_A7(%a6),%a0
3516 	mov.l		EXC_A6(%a6),(%a6)
3519 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
3529 	mov.l		(%a6),EXC_A6(%a6)
3533 	mov.l		%a0,EXC_EA(%a6)		# stack correct <ea>
3535 	mov.l		EXC_A6(%a6),(%a6)
3537 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # is <ea> mode -(a7)?
3541 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
3542 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3543 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3545 	frestore	FP_SRC(%a6)
3547 	mov.l		EXC_A6(%a6),%a6		# restore frame pointer
3606 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
3608 	fsave		FP_SRC(%a6)		# grab the "busy" frame
3610  	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
3611 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
3612  	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
3615 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
3617 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
3618 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
3620 	mov.l		%d0,EXC_OPWORD(%a6)
3633 	cmpi.w		FP_SRC_EX(%a6),&0x401e	# is exponent 0x401e?
3636 	fmov.l		FP_SRC_HI(%a6),%fp0	# load integer src
3637 	fmov.x		%fp0,FP_SRC(%a6)	# store integer as extended precision
3638 	mov.w		&0xe001,0x2+FP_SRC(%a6)
3641 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
3649 	andi.l		&0x00ff01ff,USER_FPSR(%a6) # zero all but accured field
3654 	bfextu		EXC_EXTWORD(%a6){&0:&6},%d1 # extract upper 6 of cmdreg
3658 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
3660 	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM
3665 	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
3668 	btst		&0x4,1+EXC_CMDREG(%a6)	# is operation an fsincos?
3671 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
3674 	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
3680 	mov.b		%d0,DTAG(%a6)		# save dst optype tag
3684 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode
3686 	mov.b		1+EXC_CMDREG(%a6),%d1
3689 	lea		FP_SRC(%a6),%a0
3690 	lea		FP_DST(%a6),%a1
3697 	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
3701 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
3702 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3703 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3705 	frestore	FP_SRC(%a6)
3707 	unlk		%a6
3712 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec,mode
3713 	mov.b		1+EXC_CMDREG(%a6),%d1
3734 	mov.b		&NORM,STAG(%a6)		# src is a NORM
3737 	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec,mode
3739 	andi.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field
3741 	lea		FP_SRC(%a6),%a0		# pass ptr to src operand
3780 	link.w		%a6,&-LOCAL_SIZE	# init stack frame
3782 	fsave		FP_SRC(%a6)		# grab the "busy" frame
3784  	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
3785 	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
3786  	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack
3789 	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
3791 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
3792 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
3794 	mov.l		%d0,EXC_OPWORD(%a6)
3802 	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
3806 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
3807 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
3808 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
3810 	frestore	FP_SRC(%a6)
3812 	unlk		%a6
3889 	mov.b		1+EXC_OPWORD(%a6), %d0	# fetch opcode word
3906 	mov.l		EXC_EA(%a6),%a0		# return <ea>
3912 	mov.b		&immed_flg,SPCOND_FLG(%a6)
3913 	lea		([USER_FPIAR,%a6],0x4),%a0 # no; return <ea>
3922 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
3933 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
3940 	mov.l		%a0,EXC_EA(%a6)		# put correct <ea> on stack
3972 	mov.b		1+EXC_OPWORD(%a6),%d0	# fetch opcode word
3984 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
3992 	mov.l		EXC_EA(%a6),%a0
4007 	addi.l		&0xc,EXC_DREGS+0x8(%a6)
4010 	addi.l		&0xc,EXC_DREGS+0xc(%a6)
4025 	addi.l		&0xc,EXC_A6(%a6)
4028 	mov.b		&mia7_flg,SPCOND_FLG(%a6)
4029 	addi.l		&0xc,EXC_A7(%a6)
4037 	mov.l		EXC_EA(%a6),%a0
4039 	sub.l		&0x8,EXC_EA(%a6)
4054 	mov.l		%a0,EXC_DREGS+0x8(%a6)
4057 	mov.l		%a0,EXC_DREGS+0xc(%a6)
4072 	mov.l		%a0,EXC_A6(%a6)
4075 	mov.l		%a0,EXC_A7(%a6)
4076 	mov.b		&mda7_flg,SPCOND_FLG(%a6)
4278 	mov.b		1+EXC_EXTWORD(%a6),%d1	# fetch extword
4299 	btst		&0x5,EXC_EXTWORD(%a6)	# is it a move in or out?
4306 	btst		&0x4,EXC_EXTWORD(%a6)	# control or predecrement?
4316 	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode?
4320 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # is <ea> mode -(a7)?
4338 	mov.l		0x0+EXC_FP0(%a6),(%a0)+	# yes
4339 	mov.l		0x4+EXC_FP0(%a6),(%a0)+
4340 	mov.l		0x8+EXC_FP0(%a6),(%a0)+
4346 	mov.l		0x0+EXC_FP1(%a6),(%a0)+	# yes
4347 	mov.l		0x4+EXC_FP1(%a6),(%a0)+
4348 	mov.l		0x8+EXC_FP1(%a6),(%a0)+
4393 	mov.l		%a1,L_SCR1(%a6)
4411 	mov.l		%a0,L_SCR1(%a6)
4433 	mov.l		(%a0)+,0x0+EXC_FP0(%a6)	# yes
4434 	mov.l		(%a0)+,0x4+EXC_FP0(%a6)
4435 	mov.l		(%a0)+,0x8+EXC_FP0(%a6)
4441 	mov.l		(%a0)+,0x0+EXC_FP1(%a6)	# yes
4442 	mov.l		(%a0)+,0x4+EXC_FP1(%a6)
4443 	mov.l		(%a0)+,0x8+EXC_FP1(%a6)
4587 	mov.w		EXC_OPWORD(%a6),%d0	# fetch opcode word
4675 	mov.l		EXC_DREGS+0x8(%a6),%a0	# Get current a0
4679 	mov.l		EXC_DREGS+0xc(%a6),%a0	# Get current a1
4699 	mov.l		(%a6),%a0		# Get current a6
4703 	mov.l		EXC_A7(%a6),%a0		# Get current a7
4710 	mov.l		EXC_DREGS+0x8(%a6),%d0	# Get current a0
4713 	mov.l		%d1,EXC_DREGS+0x8(%a6)	# Save incr value
4718 	mov.l		EXC_DREGS+0xc(%a6),%d0	# Get current a1
4721 	mov.l		%d1,EXC_DREGS+0xc(%a6)	# Save incr value
4758 	mov.l		(%a6),%d0		# Get current a6
4761 	mov.l		%d1,(%a6)		# Save incr value
4766 	mov.b		&mia7_flg,SPCOND_FLG(%a6) # set "special case" flag
4768 	mov.l		EXC_A7(%a6),%d0		# Get current a7
4771 	mov.l		%d1,EXC_A7(%a6)		# Save incr value
4779 	mov.l		EXC_DREGS+0x8(%a6),%d0	# Get current a0
4781 	mov.l		%d0,EXC_DREGS+0x8(%a6)	# Save decr value
4786 	mov.l		EXC_DREGS+0xc(%a6),%d0	# Get current a1
4788 	mov.l		%d0,EXC_DREGS+0xc(%a6)	# Save decr value
4821 	mov.l		(%a6),%d0		# Get current a6
4823 	mov.l		%d0,(%a6)		# Save decr value
4828 	mov.b		&mda7_flg,SPCOND_FLG(%a6) # set "special case" flag
4830 	mov.l		EXC_A7(%a6),%d0		# Get current a7
4832 	mov.l		%d0,EXC_A7(%a6)		# Save decr value
4840 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4841 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4849 	add.l		EXC_DREGS+0x8(%a6),%a0	# a0 + d16
4853 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4854 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4862 	add.l		EXC_DREGS+0xc(%a6),%a0	# a1 + d16
4866 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4867 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4879 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4880 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4892 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4893 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4905 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4906 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4918 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4919 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4927 	add.l		(%a6),%a0		# a6 + d16
4931 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4932 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4940 	add.l		EXC_A7(%a6),%a0		# a7 + d16
4954 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
4955 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
4966 	mov.l		%d0,L_SCR1(%a6)		# hold opword
4976 	mov.l		L_SCR1(%a6),%d2		# fetch opword
4999 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5000 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
5013 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5014 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5027 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5028 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
5036 	add.l		EXC_EXTWPTR(%a6),%a0	# pc + d16
5049 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5050 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
5056 	mov.l		EXC_EXTWPTR(%a6),%a0	# put base in a0
5062 	mov.l		%d0,L_SCR1(%a6)		# store opword
5072 	mov.l		L_SCR1(%a6),%d2		# fetch opword
5109 	mov.l		%d0,L_SCR1(%a6)		# save d0 (opword)
5115 	mov.l		L_SCR1(%a6),%d5
5142 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5143 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5152 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5153 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
5173 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5174 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5183 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5184 	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
5254 	mov.l		L_SCR1(%a6),%a0
5270 #		USER_FPCR(a6)  = new FPCR value				#
5271 #		USER_FPSR(a6)  = new FPSR value				#
5272 #		USER_FPIAR(a6) = new FPIAR value			#
5296 	mov.b		EXC_EXTWORD(%a6),%d0	# fetch reg select bits
5306 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5307 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5313 	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to stack
5314 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5315 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5321 	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to stack
5326 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5327 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5333 	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to stack
5334 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5335 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5341 	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to stack
5346 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5347 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5353 	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to mem
5354 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5355 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5361 	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to mem
5366 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5367 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5373 	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to mem
5374 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5375 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5381 	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to mem
5382 	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
5383 	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
5389 	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to mem
5403 #	FP_SRC(a6) = fp op1(src)					#
5404 #	FP_DST(a6) = fp op2(dst)					#
5407 #	FP_SRC(a6) = fp op1 scaled(src)					#
5408 #	FP_DST(a6) = fp op2 scaled(dst)					#
5424 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
5425 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
5426 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
5427 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
5430 	mov.w		%d0,FP_SCR0_EX(%a6)
5431 	mov.w		%d1,FP_SCR1_EX(%a6)
5435 	mov.w		%d0,L_SCR1(%a6)		# store src exponent
5436 	mov.w		%d1,2+L_SCR1(%a6)	# store dst exponent
5446 	cmpi.b		STAG(%a6),&DENORM	# is dst denormalized?
5449 	lea		FP_SCR0(%a6),%a0
5452 	mov.w		%d0,L_SCR1(%a6)		# inset new exp
5455 	mov.w		2+L_SCR1(%a6),%d0
5458 	cmp.w		%d0,L_SCR1(%a6)		# is difference >= len(mantissa)+2?
5461 	mov.w		L_SCR1(%a6),%d0
5463 	mov.w		FP_SCR0_EX(%a6),%d1
5466 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new dst exponent
5472 	andi.w		&0x8000,FP_SCR0_EX(%a6)	# zero src exponent
5473 	bset		&0x0,1+FP_SCR0_EX(%a6)	# set exp = 1
5483 	cmpi.b		DTAG(%a6),&DENORM	# is dst denormalized?
5485 	lea		FP_SCR1(%a6),%a0
5488 	mov.w		%d0,2+L_SCR1(%a6)	# inset new exp
5491 	mov.w		L_SCR1(%a6),%d0
5494 	cmp.w		%d0,2+L_SCR1(%a6)	# is difference >= len(mantissa)+2?
5497 	mov.w		2+L_SCR1(%a6),%d0
5499 	mov.w		FP_SCR1_EX(%a6),%d1
5502 	mov.w		%d0,FP_SCR1_EX(%a6)	# insert new dst exponent
5508 	andi.w		&0x8000,FP_SCR1_EX(%a6)	# zero dst exponent
5509 	bset		&0x0,1+FP_SCR1_EX(%a6)	# set exp = 1
5519 #			     value at FP_SCR0(a6).			#
5525 #	FP_SCR0(a6) = extended precision operand to be scaled		#
5528 #	FP_SCR0(a6) = scaled extended precision operand			#
5541 	mov.w		FP_SCR0_EX(%a6),%d1	# extract operand's {sgn,exp}
5549 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert biased exponent
5551 	cmpi.b		STAG(%a6),&DENORM	# is operand normalized?
5561 	lea		FP_SCR0(%a6),%a0	# pass ptr to src op
5578 #	FP_SCR0(a6) = extended precision operand to be scaled		#
5581 #	FP_SCR0(a6) = scaled extended precision operand			#
5595 	cmpi.b		STAG(%a6),&DENORM	# is operand normalized?
5598 	mov.w		FP_SCR0_EX(%a6),%d1	# extract operand's {sgn,exp}
5601 	andi.w		&0x8000,FP_SCR0_EX(%a6)	# extract operand's sgn
5606 	ori.w		&0x3fff,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)
5614 	ori.w		&0x3ffe,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)
5622 	lea		FP_SCR0(%a6),%a0	# pass ptr to src op
5628 	ori.w		&0x3fff,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)
5635 	ori.w		&0x3ffe,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)
5646 #			     value at FP_SCR1(a6).			#
5652 #	FP_SCR1(a6) = extended precision operand to be scaled		#
5655 #	FP_SCR1(a6
5668 	mov.w		FP_SCR1_EX(%a6),%d1	# extract operand's {sgn,exp}
5676 	mov.w		%d0,FP_SCR1_EX(%a6)	# insert biased exponent
5678 	cmpi.b		DTAG(%a6),&DENORM	# is operand normalized?
5687 	lea		FP_SCR1(%a6),%a0	# pass ptr to dst op
5706 #	FP_SRC(a6) = pointer to extended precision src operand		#
5707 #	FP_DST(a6) = pointer to extended precision dst operand		#
5732 	cmp.b		DTAG(%a6), &SNAN	# is the dst an SNAN?
5734 	cmp.b		DTAG(%a6), &QNAN	# is the dst a  QNAN?
5737 	cmp.b		STAG(%a6), &QNAN
5742 	bset		&0x6, FP_SRC_HI(%a6)	# set SNAN bit
5743 	or.l		&nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
5744 	lea		FP_SRC(%a6), %a0
5749 	or.l		&nan_mask, USER_FPSR(%a6)
5750 	lea		FP_SRC(%a6), %a0
5753 	or.l		&nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
5754 	bset		&0x6, FP_DST_HI(%a6)	# set SNAN bit
5755 	lea		FP_DST(%a6), %a0
5758 	lea		FP_DST(%a6), %a0
5759 	cmp.b		STAG(%a6), &SNAN
5761 	or.l		&aiop_mask+snan_mask, USER_FPSR(%a6)	
5763 	or.l		&nan_mask, USER_FPSR(%a6)
5767 	or.l		&neg_mask, USER_FPSR(%a6)
5796 	or.l		&nan_mask+operr_mask+aiop_mask, USER_FPSR(%a6)
5858 	btst		&inex2_bit, FPSR_EXCEPT(%a6) # yes; was INEX2 set?
5900 	mov.l		FTEMP_LO(%a0), FTEMP_LO2(%a6) # make FTEMP_LO copy
5901 	mov.l		%d0, GRS(%a6)		# place g,r,s after it
5920 	mov.l		GRS(%a6), %d0 		# restore original g,r,s
5955 	mov.b		GRS(%a6), %d2
5956 	or.b		%d2, 3+FTEMP_LO2(%a6)
5961 	bfextu		FTEMP_LO2(%a6){%d0:&32}, %d0 # %d0 = new G,R,S
6009 	mov.b		GRS(%a6), %d2
6010 	or.b		%d2, 3+FTEMP_LO2(%a6)
6017 	bftst		FTEMP_LO2(%a6){%d0:&31}	# were any bits shifted off?
6119 	tst.b		GRS(%a6)		# were any bits shifted off?
6188 	or.w		&inx2a_mask, 2+USER_FPSR(%a6) # set inex2/ainex
6876 #	bset		&z_bit, FPSR_CC(%a6)	# yes; set zero ccode bit
6886 	btst		&inex2_bit, FPSR_EXCEPT(%a6) # is INEX2 set?
6888 	bset		&aunfl_bit, FPSR_AEXCEPT(%a6) # yes; set aunfl
6936 #	bset		&z_bit,FPSR_CC(%a6)	# yes; set zero ccode bit
6946 	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
6948 	bset		&aunfl_bit,FPSR_AEXCEPT(%a6) # yes; set aunfl
7112 	bfextu		EXC_CMDREG(%a6){&3:&3},%d1 # extract dst fmt
7134 	tst.b		STAG(%a6)		# is operand normalized?
7146 	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits
7148 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7152 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7161 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7180 	tst.b		STAG(%a6)		# is operand normalized?
7192 	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits
7194 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7198 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7207 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7226 	tst.b		STAG(%a6)		# is operand normalized?
7238 	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits
7241 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7245 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7254 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7278 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
7279 	clr.w		2+FP_SCR0_EX(%a6)	# clear reserved field
7280 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
7281 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
7288 	lea		FP_SCR0(%a6),%a0	# pass: src addr
7294 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
7302 	tst.b		STAG(%a6)		# is operand normalized?
7308 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set underflow exc bit
7310 	mov.b		FPCR_ENABLE(%a6),%d0
7323 	tst.b		STAG(%a6)		# is operand normalized?
7328 	lea		FP_SCR0(%a6),%a0
7332 	andi.w		&0x8000,FP_SCR0_EX(%a6)	# keep only old sign
7333 	or.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
7334 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
7338 	mov.l		EXC_A6(%a6),(%a6)	# fix stacked a6
7347 	mov.l		%d0,L_SCR3(%a6)		# save rnd prec,mode on stack
7371 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
7379 	or.w		%d1,2+USER_FPSR(%a6) 	# set possible inex2/ainex
7382 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7386 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7395 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7406 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set UNFL
7408 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
7409 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
7410 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
7415 	cmpi.b		STAG(%a6),&DENORM	# fetch src optype tag
7418 	lea		FP_SCR0(%a6),%a0
7422 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
7423 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
7426 	lea		FP_SCR0(%a6),%a0	# pass: ptr to fop
7429 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7433 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7442 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7447 	mov.b		FPCR_ENABLE(%a6),%d1
7461 	ori.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
7464 	ori.w		&ovfinx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex/inex2
7474 	mov.l		L_SCR3(%a6),%d0		# pass: sgl prec,rnd mode
7479 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
7483 	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
7492 	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
7497 	mov.b		FPCR_ENABLE(%a6),%d1
7515 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert scaled exp
7516 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6) # copy hi(man)
7517 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6) # copy lo(man)
7519 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
7521 	fmov.x		FP_SCR0(%a6),%fp0	# force fop to be rounded
7534 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
7535 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
7536 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
7538 	cmpi.b		STAG(%a6),&DENORM	# was src a DENORM?
7541 	lea		FP_SCR0(%a6),%a0
7545 	bfins		%d0,FP_SCR0_EX(%a6){&1:&15}
7552 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
7553 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
7554 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
7557 	bclr		&0x7,FP_SCR0_EX(%a6)	# clear sign bit
7558 	sne.b		2+FP_SCR0_EX(%a6)	# set internal sign bit
7559 	lea		FP_SCR0(%a6),%a0	# pass: ptr to DENORM
7561 	mov.b		3+L_SCR3(%a6),%d1
7565 	mov.b		3+L_SCR3(%a6),%d1
7571 	tst.b		2+FP_SCR0_EX(%a6)	# is EXOP negative?
7573 	bset		&0x7,FP_SCR0_EX(%a6)	# yes
7576 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
7585 	mov.l		%d0,L_SCR3(%a6)		# save rnd prec,mode on stack
7609 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
7612 	fmov.d		%fp0,L_SCR1(%a6)	# store does convert and round
7617 	or.w		%d0,2+USER_FPSR(%a6) 	# set possible inex2/ainex
7619 	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
7620 	lea		L_SCR1(%a6),%a0		# pass: src addr
7635 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set UNFL
7637 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
7638 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
7639 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
7644 	cmpi.b		STAG(%a6),&DENORM	# fetch src optype tag
7647 	lea		FP_SCR0(%a6),%a0
7651 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
7652 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
7655 	lea		FP_SCR0(%a6),%a0	# pass: ptr to fop
7657 	mov.l		%d0,L_SCR1(%a6)
7658 	mov.l		%d1,L_SCR2(%a6)
7660 	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
7661 	lea		L_SCR1(%a6),%a0		# pass: src addr
7668 	mov.b		FPCR_ENABLE(%a6),%d1
7682 	ori.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
7685 	ori.w		&ovfinx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex/inex2
7695 	mov.l		L_SCR3(%a6),%d0		# pass: dbl prec,rnd mode
7698 	fmov.d		%fp0,L_SCR1(%a6)	# store to double
7700 	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
7701 	lea		L_SCR1(%a6),%a0		# pass: src addr
7708 	mov.b		FPCR_ENABLE(%a6),%d1
7726 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert scaled exp
7727 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6) # copy hi(man)
7728 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6) # copy lo(man)
7730 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
7732 	fmov.x		FP_SCR0(%a6),%fp0	# force fop to be rounded
7796 	mov.l		%d0,L_SCR1(%a6)		# put the new exp back on the stack
7800 	mov.l		%d1,L_SCR2(%a6)		# build lower lword in memory
7803 	mov.l		L_SCR2(%a6),%d1
7805 	mov.l		L_SCR1(%a6),%d0
7869 	mov.b		STAG(%a6),%d0		# fetch input type
7873 	btst		&0x4,EXC_CMDREG(%a6)	# static or dynamic?
7877 	mov.b		1+EXC_CMDREG(%a6),%d1	# fetch dynamic reg
7885 	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch static field
7891 	lea		FP_SRC(%a6),%a0		# pass: ptr to input
7897 #	andi.l		&0xcfff000f,FP_SCR0(%a6) # clear unused fields
7898 	andi.l		&0xcffff00f,FP_SCR0(%a6) # clear unused fields
7902 	tst.b		3+FP_SCR0_EX(%a6)
7904 	tst.l		FP_SCR0_HI(%a6)
7906 	tst.l		FP_SCR0_LO(%a6)
7918 	andi.w		&0xf000,FP_SCR0(%a6)
7922 	lea		FP_SCR0(%a6),%a0	# pass: src addr
7928 	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
7951 	lea		FP_SRC(%a6),%a0
7952 	clr.w		2+FP_SRC_EX(%a6)
7958 	ori.w		&snaniop2_mask,FPSR_EXCEPT(%a6) # set SNAN/AIOP
7959 	bset		&0x6,FP_SRC_HI(%a6)	# set snan bit
8020 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
8023 	mov.b		DTAG(%a6),%d1
8025 	or.b		STAG(%a6),%d1		# combine src tags
8029 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
8030 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
8031 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
8033 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
8034 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
8035 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
8044 	mov.w		2+L_SCR3(%a6),%d1	# fetch precision
8064 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8066 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8069 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply	
8074 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8077 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
8079 	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
8085 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8087 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
8104 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8106 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8109 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply	
8114 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8118 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8120 	mov.b		FPCR_ENABLE(%a6),%d1
8126 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
8128 	mov.l		L_SCR3(%a6),%d0		# pass rnd prec,mode
8130 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
8141 	mov.l		L_SCR3(%a6),%d1
8146 	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack
8149 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
8157 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8159 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
8163 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8165 	mov.l		L_SCR3(%a6),%d1
8169 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
8182 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
8184 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8187 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
8192 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8215 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
8220 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8225 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
8230 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8232 	mov.b		FPCR_ENABLE(%a6),%d1
8237 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
8239 	lea		FP_SCR0(%a6),%a0	# pass: result addr
8240 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
8242 	or.b		%d0,FPSR_CC(%a6)	# unf_res2 may have set 'Z'
8243 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
8250 a6),&0x40	# load dst op
8252 	mov.l		L_SCR3(%a6),%d1
8258 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8263 	fmul.x		FP_SCR0(%a6),%fp1	# execute multiply	
8267 	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
8269 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
8277 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8279 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
8283 	mov.l		L_SCR3(%a6),%d1
8293 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8295 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8298 	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply	
8303 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8317 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst operand
8319 	mov.l		L_SCR3(%a6),%d1
8326 	fmul.x		FP_SCR0(%a6),%fp1	# execute multiply	
8417 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set Z/N
8421 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
8442 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/N
8446 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
8505 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
8507 	mov.b		STAG(%a6),%d1		# fetch src optype tag
8524 	bset		&neg_bit,FPSR_CC(%a6)	# yes, so set 'N' ccode bit
8537 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
8540 	bset		&neg_bit,FPSR_CC(%a6)	# yes, so set 'N' ccode bit
8543 	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
8553 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
8554 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
8555 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
8556 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
8560 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
8564 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
8565 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
8579 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
8580 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
8581 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
8595 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8597 	fmov.x		FP_SCR0(%a6),%fp0	# perform move
8602 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8606 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
8607 	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
8613 	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
8615 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
8622 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
8623 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
8624 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
8638 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
8640 	tst.b		FP_SCR0_EX(%a6)		# is operand negative?
8642 	bset		&neg_bit,FPSR_CC(%a6)	# set 'N' ccode bit
8646 	mov.b		FPCR_ENABLE(%a6),%d1
8651 	lea		FP_SCR0(%a6),%a0	# pass: result addr
8652 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
8654 	or.b		%d0,FPSR_CC(%a6)	# unf_res may have set 'Z'
8655 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
8663 	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
8664 	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
8665 	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent
8675 	mov.w		%d2,FP_SCR1_EX(%a6)	# insert new exponent
8676 	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
8685 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8687 	fmov.x		FP_SCR0(%a6),%fp0	# perform move
8692 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8695 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8697 	mov.b		FPCR_ENABLE(%a6),%d1
8706 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
8708 	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
8710 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
8721 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
8729 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8731 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
8739 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8741 	fmov.x		FP_SCR0(%a6),%fp0	# perform the move
8746 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8776 	mov.b		%d0,FPSR_CC(%a6)	# insert correct ccodes
8838 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
8841 	mov.b		DTAG(%a6),%d1
8843 	or.b		STAG(%a6),%d1		# combine src tags
8851 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
8852 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
8853 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
8855 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
8856 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
8857 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
8867 	mov.w		2+L_SCR3(%a6),%d1	# fetch precision
8878 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
8880 	fmov.l		L_SCR3(%a6),%fpcr	# save FPCR
8883 	fdiv.x		FP_SCR0(%a6),%fp0	# perform divide
8888 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
8891 	fmovm.x		&0x80,FP_SCR0(%a6)	# store result on stack
8893 	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
8899 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8901 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
8916 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
8918 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
8921 	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide
8926 	or.l		%d0,USER_FPSR(%a6)	# save INEX,N
8938 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
8940 	mov.b		FPCR_ENABLE(%a6),%d1
8945 	btst		&neg_bit,FPSR_CC(%a6) 	# is result negative?
8947 	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
8949 	or.b		%d0,FPSR_CC(%a6)	# set INF if applicable
8954 	mov.l		L_SCR3(%a6),%d1
8959 	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack
8962 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
8970 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
8972 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
8976 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand
8978 	mov.l		L_SCR3(%a6),%d1
8982 	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide
8988 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
8990 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
8995 	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide
9000 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
9002 	mov.b		FPCR_ENABLE(%a6),%d1
9007 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
9009 	lea		FP_SCR0(%a6),%a0	# pass: result addr
9010 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
9012 	or.b		%d0,FPSR_CC(%a6)	# 'Z' may have been set
9013 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
9020 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op
9022 	mov.l		L_SCR3(%a6),%d1
9026 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9031 	fdiv.x		FP_SCR0(%a6),%fp1	# execute divide
9035 	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
9037 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
9045 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exp
9047 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
9051 	mov.l		L_SCR3(%a6),%d1
9061 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
9063 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9066 	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide
9071 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
9085 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1
9087 	mov.l		L_SCR3(%a6),%d1
9094 	fdiv.x		FP_SCR0(%a6),%fp1	# execute divide
9181 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set Z/N
9185 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
9195 	ori.w		&dz_mask+adz_mask,2+USER_FPSR(%a6) # no; set DZ/ADZ
9201 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/N
9205 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
9224 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/NEG
9230 	mov.b		&inf_bmask,FPSR_CC(%a6) # set INF
9279 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
9280 	mov.b		STAG(%a6),%d1
9295 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9296 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9300 	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
9302 	mov.w		%d0,FP_SCR0_EX(%a6)
9303 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
9314 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
9316 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9317 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9321 	mov.b		&neg_bmask,FPSR_CC(%a6)	# yes, set 'N' ccode bit
9323 	mov.w		%d0,FP_SCR0_EX(%a6)
9324 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
9326 	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
9336 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
9340 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
9344 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
9345 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
9359 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
9360 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9361 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9375 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9377 	fneg.x		FP_SCR0(%a6),%fp0	# perform negation
9382 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
9386 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
9387 	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
9393 	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
9395 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
9402 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
9403 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9404 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9418 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
9420 	eori.b		&0x80,FP_SCR0_EX(%a6)	# negate sign	
9422 	bset		&neg_bit,FPSR_CC(%a6)	# set 'N' ccode bit
9426 	mov.b		FPCR_ENABLE(%a6),%d1
9431 	lea		FP_SCR0(%a6),%a0	# pass: result addr
9432 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
9434 	or.b		%d0,FPSR_CC(%a6)	# unf_res may have set 'Z'
9435 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
9443 	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
9444 	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
9445 	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent
9455 	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
9456 	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
9465 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9467 	fneg.x		FP_SCR0(%a6),%fp0	# perform negation
9472 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
9475 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
9477 	mov.b		FPCR_ENABLE(%a6),%d1
9486 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
9488 	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
9490 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
9501 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
9509 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
9510 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
9519 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9521 	fneg.x		FP_SCR0(%a6),%fp0	# perform negation
9526 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
9556 	mov.b		%d0,FPSR_CC(%a6)	# insert correct ccodes
9580 	mov.b		STAG(%a6),%d1
9591 	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
9615 	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
9625 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
9628 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'I','N' ccode bits
9638 	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
9641 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set 'Z','N' ccode bits
9672 	mov.b		STAG(%a6),%d1
9688 	or.l		%d0,USER_FPSR(%a6)	# set exception bits
9716 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
9717 	mov.b		&0x80,FP_SCR0_HI(%a6)	# force DENORM ==> small NORM
9718 	lea		FP_SCR0(%a6),%a0
9729 	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
9733 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
9744 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
9747 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'N','I' ccode bits
9778 	mov.b		STAG(%a6),%d1
9790 	or.l		%d0,USER_FPSR(%a6)	# set exception bits
9818 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
9819 	mov.b		&0x80,FP_SCR0_HI(%a6)	# force DENORM ==> small NORM
9820 	lea		FP_SCR0(%a6),%a0
9831 	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
9835 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
9846 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
9849 	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'N','I' ccode bits
9902 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
9903 	mov.b		STAG(%a6),%d1
9918 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9919 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9922 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert exponent
9923 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
9934 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
9936 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9937 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9940 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert exponent
9942 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
9944 	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
9954 	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
9958 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
9962 	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
9963 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
9977 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
9978 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
9979 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
9993 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
9995 	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute
10000 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10004 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
10005 	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
10011 	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
10013 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
10020 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
10021 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
10022 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
10036 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
10038 	bclr		&0x7,FP_SCR0_EX(%a6)	# force absolute value
10041 	mov.b		FPCR_ENABLE(%a6),%d1
10046 	lea		FP_SCR0(%a6),%a0	# pass: result addr
10047 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
10049 	or.b		%d0,FPSR_CC(%a6)	# set possible 'Z' ccode
10050 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
10058 	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
10059 	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
10060 	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent
10070 	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
10071 	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
10080 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10082 	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute
10087 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10090 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
10092 	mov.b		FPCR_ENABLE(%a6),%d1
10101 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
10103 	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
10105 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
10116 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
10124 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10125 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
10134 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10136 	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute
10141 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10168 	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
10171 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
10200 	mov.b		DTAG(%a6),%d1
10202 	or.b		STAG(%a6),%d1
10215 	mov.b		%d0,FPSR_CC(%a6)	# set ccode bits(no exc bits are set)
10286 	andi.b		&0xf7,FPSR_CC(%a6)
10290 	andi.b		&0xf7,FPSR_CC(%a6)
10306 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
10309 	mov.l		%d0,FP_SCR0_HI(%a6)
10310 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
10311 	lea		FP_SCR0(%a6),%a0
10315 	mov.l		DST_EX(%a1),FP_SCR0_EX(%a6)
10318 	mov.l		%d0,FP_SCR0_HI(%a6)
10319 	mov.l		DST_LO(%a1),FP_SCR0_LO(%a6)
10320 	lea		FP_SCR0(%a6),%a1
10324 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
10325 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
10328 	mov.l		%d0,FP_SCR1_HI(%a6)
10331 	mov.l		%d0,FP_SCR0_HI(%a6)
10332 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
10333 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
10334 	lea		FP_SCR1(%a6),%a1
10335 	lea		FP_SCR0(%a6),%a0
10349 	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
10363 	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
10401 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
10404 	mov.b		DTAG(%a6),%d1
10406 	or.b		STAG(%a6),%d1
10411 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
10412 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
10413 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
10415 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
10416 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
10417 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
10435 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10437 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10440 	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
10445 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10448 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
10450 	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
10456 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10458 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
10462 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10464 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10467 	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
10472 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10477 	or.l		&ovfl_inx_mask, USER_FPSR(%a6) # set ovfl/aovfl/ainex
10479 	mov.b		FPCR_ENABLE(%a6),%d1
10484 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
10486 	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
10489 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
10494 	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack
10497 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
10505 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10507 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
10511 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10513 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10516 	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
10521 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10531 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
10533 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10538 	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
10543 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10545 	mov.b		FPCR_ENABLE(%a6),%d1
10550 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
10552 	lea		FP_SCR0(%a6),%a0	# pass: result addr
10553 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
10555 	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
10556 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
10563 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op
10565 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10568 	fsglmul.x	FP_SCR0(%a6),%fp1	# execute sgl multiply	
10572 	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
10574 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
10582 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10584 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
10588 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10590 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10593 	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply	
10598 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10612 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1
10614 	mov.l		L_SCR3(%a6),%d1
10621 	fsglmul.x	FP_SCR0(%a6),%fp1	# execute sgl multiply	
10742 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
10745 	mov.b		DTAG(%a6),%d1
10747 	or.b		STAG(%a6),%d1		# combine src tags
10755 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
10756 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
10757 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
10759 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
10760 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
10761 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
10771 	mov.w		2+L_SCR3(%a6),%d1	# fetch precision,mode
10782 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10784 	fmov.l		L_SCR3(%a6),%fpcr	# save FPCR
10787 	fsgldiv.x	FP_SCR0(%a6),%fp0	# perform sgl divide
10792 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10795 	fmovm.x		&0x80,FP_SCR0(%a6)	# store result on stack
10797 	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
10803 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10805 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
10809 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10811 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10814 	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute divide
10819 	or.l		%d1,USER_FPSR(%a6)	# save INEX,N
10830 	or.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
10832 	mov.b		FPCR_ENABLE(%a6),%d1
10837 	btst		&neg_bit,FPSR_CC(%a6) 	# is result negative
10839 	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
10842 	or.b		%d0,FPSR_CC(%a6)	# set INF if applicable
10847 	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack
10850 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
10858 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10860 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
10864 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
10866 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10871 	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute sgl divide
10876 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10878 	mov.b		FPCR_ENABLE(%a6),%d1
10883 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
10885 	lea		FP_SCR0(%a6),%a0	# pass: result addr
10886 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
10888 	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
10889 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
10896 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op
10898 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10901 	fsgldiv.x	FP_SCR0(%a6),%fp1	# execute sgl divide
10905 	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
10907 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
10915 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
10917 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
10924 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
10926 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
10929 	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute sgl divide
10934 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
10948 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into %fp1
10956 	fsgldiv.x	FP_SCR0(%a6),%fp1	# execute sgl divide
11089 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
11092 	mov.b		DTAG(%a6),%d1
11094 	or.b		STAG(%a6),%d1		# combine src tags
11105 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11108 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
11110 	fadd.x		FP_SCR0(%a6),%fp0	# execute add
11115 	or.l		%d1,USER_FPSR(%a6)	# save exc and ccode bits
11123 	mov.w		2+L_SCR3(%a6),%d1
11163 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
11165 	mov.b		FPCR_ENABLE(%a6),%d1
11171 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
11173 	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
11175 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
11181 	mov.b		L_SCR3(%a6),%d1
11197 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11199 	mov.l		L_SCR3(%a6),%d1
11203 	fadd.x		FP_SCR0(%a6),%fp0	# execute add
11212 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
11216 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11221 	fadd.x		FP_SCR0(%a6),%fp0	# execute add
11226 	or.l		%d1,USER_FPSR(%a6)	# save INEX,N
11228 	mov.b		FPCR_ENABLE(%a6),%d1
11233 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
11235 	lea		FP_SCR0(%a6),%a0	# pass: result addr
11236 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
11238 	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
11239 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
11244 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op
11246 	mov.l		L_SCR3(%a6),%d1
11250 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
11255 	fadd.x		FP_SCR0(%a6),%fp1	# execute multiply
11259 	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
11260 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
11268 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
11269 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
11273 	mov.l		L_SCR3(%a6),%d1
11285 	mov.l		L_SCR3(%a6),%d1
11296 	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
11309 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1
11311 	mov.l		L_SCR3(%a6),%d1
11317 	fadd.x		FP_SCR0(%a6),%fp1	# execute add
11412 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
11421 	mov.b		3+L_SCR3(%a6),%d1
11426 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
11431 a6) # set NEG/Z
11439 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
11440 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
11441 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
11443 	clr.w		FP_SCR1_EX(%a6)
11444 	clr.l		FP_SCR1_HI(%a6)
11445 	clr.l		FP_SCR1_LO(%a6)
11449 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
11450 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
11451 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
11453 	clr.w		FP_SCR0_EX(%a6)
11454 	clr.l		FP_SCR0_HI(%a6)
11455 	clr.l		FP_SCR0_LO(%a6)
11478 	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
11488 	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
11492 	mov.b		&inf_bmask,FPSR_CC(%a6) # set INF
11542 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
11545 	mov.b		DTAG(%a6),%d1
11547 	or.b		STAG(%a6),%d1		# combine src tags
11558 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11561 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
11563 	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract
11568 	or.l		%d1,USER_FPSR(%a6)	# save exc and ccode bits
11576 	mov.w		2+L_SCR3(%a6),%d1
11616 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
11618 	mov.b		FPCR_ENABLE(%a6),%d1
11624 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
11626 	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
11628 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
11634 	mov.b		L_SCR3(%a6),%d1
11650 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11652 	mov.l		L_SCR3(%a6),%d1
11656 	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract
11665 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
11669 	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
11674 	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract
11679 	or.l		%d1,USER_FPSR(%a6)
11681 	mov.b		FPCR_ENABLE(%a6),%d1
11686 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
11688 	lea		FP_SCR0(%a6),%a0	# pass: result addr
11689 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
11691 	or.b		%d0,FPSR_CC(%a6)	# 'Z' may have been set
11692 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
11697 	fmovm.x		FP_SCR1(%a6),&0x40
11699 	mov.l		L_SCR3(%a6),%d1
11703 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
11708 	fsub.x		FP_SCR0(%a6),%fp1	# execute subtract
11712 	fmovm.x		&0x40,FP_SCR0(%a6)	# store result to stack
11713 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
11721 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
11722 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
11726 	mov.l		L_SCR3(%a6),%d1
11738 	mov.l		L_SCR3(%a6),%d1
11749 	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
11762 	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1
11764 	mov.l		L_SCR3(%a6),%d1
11770 	fsub.x		FP_SCR0(%a6),%fp1	# execute subtract
11864 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
11873 	mov.b		3+L_SCR3(%a6),%d1
11878 	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
11883 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set Z/NEG
11891 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
11892 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
11893 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
11895 	clr.w		FP_SCR1_EX(%a6)
11896 	clr.l		FP_SCR1_HI(%a6)
11897 	clr.l		FP_SCR1_LO(%a6)
11901 	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
11902 	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
11903 	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
11905 	clr.w		FP_SCR0_EX(%a6)
11906 	clr.l		FP_SCR0_HI(%a6)
11907 	clr.l		FP_SCR0_LO(%a6)
11927 	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG	
11934 	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
11938 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
11987 	mov.l		%d0,L_SCR3(%a6)		# store rnd info
11989 	mov.b		STAG(%a6),%d1
12002 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
12008 	or.l		%d1,USER_FPSR(%a6)	# set N,INEX
12019 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
12020 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
12021 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
12038 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
12039 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
12040 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
12056 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
12058 	fsqrt.x		FP_SCR0(%a6),%fp0	# perform absolute
12063 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
12067 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
12068 	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
12074 	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
12076 	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
12083 	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
12084 	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
12085 	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
12101 	btst		&0x0,1+FP_SCR0_EX(%a6)	# is exponent 0x3fff?
12108 	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
12113 	fsqrt.x 	FP_SCR0(%a6),%fp0	# execute square root
12118 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
12121 	mov.b		FPCR_ENABLE(%a6),%d1
12126 	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
12128 	lea		FP_SCR0(%a6),%a0	# pass: result addr
12129 	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
12131 	or.b		%d0,FPSR_CC(%a6)	# set possible 'Z' ccode
12132 	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
12140 	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
12141 	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
12142 	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent
12152 	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
12153 	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
12162 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
12164 	fsqrt.x		FP_SCR0(%a6),%fp0	# perform square root
12169 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
12172 	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex
12174 	mov.b		FPCR_ENABLE(%a6),%d1
12183 	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
12185 	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
12187 	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
12198 	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
12206 	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
12207 	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
12215 	btst		&0x0,1+FP_SCR0_EX(%a6)	# is exponent 0x3fff?
12219 	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
12221 	fsqrt.x		FP_SCR0(%a6),%fp0	# perform absolute
12226 	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N
12262 	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
12266 	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set 'Z','N' ccode bits
12274 	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
12293 # address register indexes start at 8). D0/D1/A0/A1/A6/A7 are on the	#
12323 	mov.l		EXC_DREGS+0x0(%a6),%d0
12326 	mov.l		EXC_DREGS+0x4(%a6),%d0
12347 	mov.l		EXC_DREGS+0x8(%a6),%d0
12350 	mov.l		EXC_DREGS+0xc(%a6),%d0
12365 	mov.l		(%a6),%d0
12368 	mov.l		EXC_A7(%a6),%d0
12408 	mov.l		%d0,EXC_DREGS+0x0(%a6)
12411 	mov.l		%d0,EXC_DREGS+0x4(%a6)
12469 	mov.w		%d0,2+EXC_DREGS+0x0(%a6)
12472 	mov.w		%d0,2+EXC_DREGS+0x4(%a6)
12530 	mov.b		%d0,3+EXC_DREGS+0x0(%a6)
12533 	mov.b		%d0,3+EXC_DREGS+0x4(%a6)
12571 # specified by d1. A0/A1/A6/A7 reside on the stack. The rest reside	#
12595 iareg0:	add.l		%d0,EXC_DREGS+0x8(%a6)
12597 iareg1:	add.l		%d0,EXC_DREGS+0xc(%a6)
12607 iareg6:	add.l		%d0,(%a6)
12609 iareg7:	mov.b		&mia7_flg,SPCOND_FLG(%a6)
12612 	add.l		%d0,EXC_A7(%a6)
12615 	addq.l		&0x2,EXC_A7(%a6)
12635 # specified by d1. A0/A1/A6/A7 reside on the stack. The rest reside	#
12659 dareg0:	sub.l		%d0,EXC_DREGS+0x8(%a6)
12661 dareg1:	sub.l		%d0,EXC_DREGS+0xc(%a6)
12671 dareg6:	sub.l		%d0,(%a6)
12673 dareg7:	mov.b		&mda7_flg,SPCOND_FLG(%a6)
12676 	sub.l		%d0,EXC_A7(%a6)
12679 	subq.l		&0x2,EXC_A7(%a6)
12686 #	load_fpn1(): load FP register value into FP_SRC(a6).		#
12695 #	FP_SRC(a6) = value loaded from FP register file			#
12698 #	Using the index in d0, load FP_SRC(a6) with a number from the 	#
12719 	mov.l		0+EXC_FP0(%a6), 0+FP_SRC(%a6)
12720 	mov.l		4+EXC_FP0(%a6), 4+FP_SRC(%a6)
12721 	mov.l		8+EXC_FP0(%a6), 8+FP_SRC(%a6)
12722 	lea		FP_SRC(%a6), %a0
12725 	mov.l		0+EXC_FP1(%a6), 0+FP_SRC(%a6)
12726 	mov.l		4+EXC_FP1(%a6), 4+FP_SRC(%a6)
12727 	mov.l		8+EXC_FP1(%a6), 8+FP_SRC(%a6)
12728 	lea		FP_SRC(%a6), %a0
12731 	fmovm.x		&0x20, FP_SRC(%a6)
12732 	lea		FP_SRC(%a6), %a0
12735 	fmovm.x		&0x10, FP_SRC(%a6)
12736 	lea		FP_SRC(%a6), %a0
12739 	fmovm.x		&0x08, FP_SRC(%a6)
12740 	lea		FP_SRC(%a6), %a0
12743 	fmovm.x		&0x04, FP_SRC(%a6)
12744 	lea		FP_SRC(%a6), %a0
12747 	fmovm.x		&0x02, FP_SRC(%a6)
12748 	lea		FP_SRC(%a6), %a0
12751 	fmovm.x		&0x01, FP_SRC(%a6)
12752 	lea		FP_SRC(%a6), %a0
12759 #	load_fpn2(): load FP register value into FP_DST(a6).		#
12768 #	FP_DST(a6) = value loaded from FP register file			#
12771 #	Using the index in d0, load FP_DST(a6) with a number from the 	#
12792 	mov.l		0+EXC_FP0(%a6), 0+FP_DST(%a6)
12793 	mov.l		4+EXC_FP0(%a6), 4+FP_DST(%a6)
12794 	mov.l		8+EXC_FP0(%a6), 8+FP_DST(%a6)
12795 	lea		FP_DST(%a6), %a0
12798 	mov.l		0+EXC_FP1(%a6), 0+FP_DST(%a6)
12799 	mov.l		4+EXC_FP1(%a6), 4+FP_DST(%a6)
12800 	mov.l		8+EXC_FP1(%a6), 8+FP_DST(%a6)
12801 	lea		FP_DST(%a6), %a0
12804 	fmovm.x		&0x20, FP_DST(%a6)
12805 	lea		FP_DST(%a6), %a0
12808 	fmovm.x		&0x10, FP_DST(%a6)
12809 	lea		FP_DST(%a6), %a0
12812 	fmovm.x		&0x08, FP_DST(%a6)
12813 	lea		FP_DST(%a6), %a0
12816 	fmovm.x		&0x04, FP_DST(%a6)
12817 	lea		FP_DST(%a6), %a0
12820 	fmovm.x		&0x02, FP_DST(%a6)
12821 	lea		FP_DST(%a6), %a0
12824 	fmovm.x		&0x01, FP_DST(%a6)
12825 	lea		FP_DST(%a6), %a0
12867 	fmovm.x		&0x80, EXC_FP0(%a6)
12870 	fmovm.x		&0x80, EXC_FP1(%a6)
12913 # 	FP_SRC(a6) = packed operand now as a binary FP number		#
12933 	lea		FP_SRC(%a6),%a1		# pass: ptr to super dst
12941 	bfextu		FP_SRC(%a6){&1:&15},%d0	# get exp
12949 	mov.b		3+FP_SRC(%a6),%d0	# get byte 4
12952 	tst.l		FP_SRC_HI(%a6)		# is lw 2 zero?
12954 	tst.l		FP_SRC_LO(%a6)		# is lw 3 zero?
12958 	lea		FP_SRC(%a6),%a0		# pass: ptr to packed op
12960 	fmovm.x		&0x80,FP_SRC(%a6)	# make this the srcop
13042 	mov.l		0x0(%a0),FP_SCR0_EX(%a6) # make a copy of input 
13043 	mov.l		0x4(%a0),FP_SCR0_HI(%a6) # so we don't alter it
13044 	mov.l		0x8(%a0),FP_SCR0_LO(%a6)
13046 	lea		FP_SCR0(%a6),%a0
13067 #	( )  a6: pointer to original bcd value
13109 #	( )  a6: pointer to original bcd value
13353 	mov.l		USER_FPCR(%a6),%d3	# get user's FPCR
13422 	ori.w		&inx1a_mask,2+USER_FPSR(%a6) # set INEX1/AINEX
13441 #	FP_SCR0(a6) = bcd format result on the stack.			#
13464 #		loop entry A6.						#
13466 #	A6.	Calculate LEN.						#
13511 #		A6.  This test occurs only on the first pass.  If the	#
13593 	mov.l		(%a0),L_SCR2(%a6)	# save exponent for sign check
13596 	clr.b		BINDEC_FLG(%a6)	# clr norm/denorm flag
13597 	cmpi.b		STAG(%a6),&DENORM # is input a DENORM?
13619 	st		BINDEC_FLG(%a6)	# set flag for denorm
13629 	mov.l		(%a0),FP_SCR1(%a6)	# move input to work space
13630 	mov.l		4(%a0),FP_SCR1+4(%a6)	# move input to work space
13631 	mov.l		8(%a0),FP_SCR1+8(%a6)	# move input to work space
13632 	and.l		&0x7fffffff,FP_SCR1(%a6)	# create abs(X)
13660 	tst.b		BINDEC_FLG(%a6)	# check for denorm
13665 	mov.w		FP_SCR1(%a6),%d0	# move exp to d0
13666 	mov.w		&0x3fff,FP_SCR1(%a6)	# replace exponent with 0x3fff
13667 	fmov.x		FP_SCR1(%a6),%fp0	# now fp0 has 1.f
13689 #     loop entry A6. The lower word of d5 is used for ICTR.
13693 # A6. Calculate LEN.
13739 	or.l		&opaop_mask,USER_FPSR(%a6)	# set OPERR & AIOP in USER_FPSR
13818 	bfextu		USER_FPCR(%a6){&26:&2},%d1	# get initial rmode bits
13822 	tst.l		L_SCR2(%a6)	# test sign of original x
13906 	tst.b		BINDEC_FLG(%a6)	# check for denorm
13976 #	a2: x/ptr to FP_SCR1(a6)
13983 	fmov.x		%fp0,FP_SCR1(%a6)	# move Y to memory
13984 	lea.l		FP_SCR1(%a6),%a2	# load a2 with ptr to FP_SCR1
13988 	fmov.x		FP_SCR1(%a6),%fp0	# write adjusted Y back to fpu
13998 	mov.l		USER_FPCR(%a6),L_SCR1(%a6)	# save it for later
13999 	and.l		&0x00000030,USER_FPCR(%a6)	# set size to ext, 
14017 #	a2: ptr to FP_SCR1(a6)/Unchanged
14018 #	a6: temp pointer to FP_SCR1(a6) - orig value saved and restored
14029 	mov.l	L_SCR1(%a6),-(%sp)
14030 	mov.l	L_SCR2(%a6),-(%sp)
14032 	lea.l		FP_SCR1(%a6),%a0	# a0 is ptr to FP_SCR1(a6)
14033 	fmov.x		%fp0,(%a0)	# move Y to memory at FP_SCR1(a6)
14034 	tst.l		L_SCR2(%a6)	# test sign of original operand
14038 	mov.l	USER_FPSR(%a6),-(%sp)
14041 	fmov.l	USER_FPCR(%a6),%fpcr
14043 ##	mov.l		USER_FPCR(%a6),%d0	# ext prec/keep rnd mode
14046 	fint.x		FP_SCR1(%a6),%fp0	# do fint()
14048 	or.w	%d0,FPSR_EXCEPT(%a6)
14051 ##	or.w		%d0,FPSR_EXCEPT(%a6)
14053 	mov.b	(%sp),USER_FPSR(%a6)
14056 	mov.l	(%sp)+,L_SCR2(%a6)
14057 	mov.l	(%sp)+,L_SCR1(%a6)
14060 	mov.l	L_SCR2(%a6),FP_SCR1(%a6)	# restore original exponent
14061 	mov.l	L_SCR1(%a6),USER_FPCR(%a6)	# restore user's FPCR
14066 #      A6.  This test occurs only on the first pass.  If the
14085 #	a2: ptr to FP_SCR1(a6)/Unchanged
14117 	tst.b		BINDEC_FLG(%a6)	# check if input was norm
14132 	bra.w		A6_str		# return to A6 and recompute YINT
14145 	bra.w		A6_str		# return to A6 and recompute YINT
14194 #	a2: ptr to FP_SCR1(a6)/Unchanged
14206 	lea.l		FP_SCR0(%a6),%a0
14243 #      Digits are stored in L_SCR1(a6) on return from BINDEC as:
14264 #	a0: ptr to result string/ptr to L_SCR1(a6)
14266 #	a2: ptr to FP_SCR1(a6)/Unchanged
14276 	tst.b		BINDEC_FLG(%a6)	# check for denorm
14302 	fmov.x		%fp0,FP_SCR1(%a6)	# store fp0 in memory
14319 	lea.l		L_SCR1(%a6),%a0	# a0 is ptr to L_SCR1 for exp digits
14321 	mov.l		L_SCR1(%a6),%d0	# load L_SCR1 lword to d0 
14324 	bfins		%d0,FP_SCR0(%a6){&4:&12}	# put e3:e2:e1 in FP_SCR0
14326 	bfins		%d0,FP_SCR0(%a6){&16:&4}	# put e4 in FP_SCR0 
14329 	or.l		&opaop_mask,USER_FPSR(%a6)	# set OPERR & AIOP in USER_FPSR
14344 #	a0: ptr to L_SCR1(a6)/Unchanged
14346 #	a2: ptr to FP_SCR1(a6)/Unchanged
14357 	and.b		&0x0f,FP_SCR0(%a6)	# clear first nibble of FP_SCR0 
14358 	tst.l		L_SCR2(%a6)	# check sign of original mantissa
14366 	bfins		%d0,FP_SCR0(%a6){&0:&2}	# insert SM and SE into FP_SCR0
14459 # A6. Test d7.  If zero, the digit formed is the ms digit.  If non-	#
14523 # A6. Test d7 and branch.
14589 	mov.w		&0x0121,EXC_VOFF(%a6)		# set FSLW
14596 	mov.w		&0x0141,EXC_VOFF(%a6)		# set FSLW
14603 	mov.w		&0x0101,EXC_VOFF(%a6)		# set FSLW
14610 	mov.w		&0x0161,EXC_VOFF(%a6)		# set FSLW
14617 	mov.w		&0x0161,EXC_VOFF(%a6)		# set FSLW
14626 	mov.w		&0x00a1,EXC_VOFF(%a6)		# set FSLW
14633 	mov.w		&0x00c1,EXC_VOFF(%a6)		# set FSLW
14640 	mov.w		&0x0081,EXC_VOFF(%a6)		# set FSLW
14647 	mov.w		&0x00e1,EXC_VOFF(%a6)		# set FSLW
14654 	mov.w		&0x00e1,EXC_VOFF(%a6)		# set FSLW
14659 	mov.l		USER_FPIAR(%a6),EXC_PC(%a6) # store current PC
14661 	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
14662 	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
14663 	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
14665 	unlk		%a6
14689 	mov.b		EXC_OPWORD+0x1(%a6),%d1
14698 	mov.b		EXC_OPWORD+0x1(%a6),%d1
14715 	sub.l		%d0,EXC_DREGS+0x8(%a6)	# fix stacked a0
14718 	sub.l		%d0,EXC_DREGS+0xc(%a6)	# fix stacked a1
14733 	sub.l		%d0,(%a6)		# fix stacked a6
14741 	cmpi.b		EXC_VOFF(%a6),&0x30	# move in or out?
14744 	btst		&0x5,EXC_SR(%a6)	# user or supervisor?

Indexes created Thu Oct 23 22:10:10 GMT 2025