Lines Matching defs:_emac3_reg_read_4
77 _emac3_reg_read_4(int ofs)
103 r = _emac3_reg_read_4(EMAC3_MR1);
114 sc->mode1_reg = _emac3_reg_read_4(EMAC3_MR1);
130 while (((_emac3_reg_read_4(EMAC3_TMR0) & TMR0_GNP0) != 0) &&
168 _emac3_reg_read_4(EMAC3_MR0) & ~(MR0_TXE | MR0_RXE));
171 while (((_emac3_reg_read_4(EMAC3_MR0) & (MR0_RXI | MR0_TXI)) !=
197 _emac3_reg_write_4(EMAC3_ISR, _emac3_reg_read_4(EMAC3_ISR));
203 u_int32_t r = _emac3_reg_read_4(EMAC3_ISR);
222 return (_emac3_reg_read_4(EMAC3_TMR0) & TMR0_GNP0);
233 r = _emac3_reg_read_4(EMAC3_RMR);
271 while ((_emac3_reg_read_4(EMAC3_MR0) & MR0_SRST) == MR0_SRST &&
346 *val =(_emac3_reg_read_4(EMAC3_STACR) >> STACR_PHYDSHIFT) & 0xffff;
360 r = _emac3_reg_read_4(EMAC3_MR1);
384 sc->mode1_reg = _emac3_reg_read_4(EMAC3_MR1);
393 while ((_emac3_reg_read_4(EMAC3_STACR) & STACR_OC) == 0 &&
Indexes created Mon Oct 13 01:09:56 GMT 2025