Lines Matching defs:_emac3_reg_write_4
85 _emac3_reg_write_4(int ofs, u_int32_t v)
112 _emac3_reg_write_4(EMAC3_MR1, r);
148 _emac3_reg_write_4(EMAC3_MR1, sc->mode1_reg);
159 _emac3_reg_write_4(EMAC3_MR0, MR0_TXE | MR0_RXE);
167 _emac3_reg_write_4(EMAC3_MR0,
183 _emac3_reg_write_4(EMAC3_ISER, ~0);
190 _emac3_reg_write_4(EMAC3_ISER, 0);
197 _emac3_reg_write_4(EMAC3_ISR, _emac3_reg_read_4(EMAC3_ISR));
206 _emac3_reg_write_4(EMAC3_ISR, r);
215 _emac3_reg_write_4(EMAC3_TMR0, TMR0_GNP0);
240 _emac3_reg_write_4(EMAC3_RMR, r);
261 _emac3_reg_write_4(EMAC3_RMR, r);
269 _emac3_reg_write_4(EMAC3_MR0, MR0_SRST);
283 _emac3_reg_write_4(EMAC3_IAHR, (eaddr[0] << 8) | eaddr[1]);
284 _emac3_reg_write_4(EMAC3_IALR, (eaddr[2] << 24) | (eaddr[3] << 16) |
288 _emac3_reg_write_4(EMAC3_IPGVR, 4);
291 _emac3_reg_write_4(EMAC3_RMR,
298 _emac3_reg_write_4(EMAC3_TMR1,
303 _emac3_reg_write_4(EMAC3_TRTR,
307 _emac3_reg_write_4(EMAC3_RWMR,
323 _emac3_reg_write_4(EMAC3_STACR, STACR_WRITE |
339 _emac3_reg_write_4(EMAC3_STACR, STACR_READ |
381 _emac3_reg_write_4(EMAC3_MR1, r);
Indexes created Wed Oct 22 13:09:56 GMT 2025