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Lines Matching refs:_reg_write_8

127 	_reg_write_8(GS_S_CSR_REG, 1 << 9);
130 	_reg_write_8(GS_S_PMODE_REG, 0); /* disable circuit 1/2 */
132 	_reg_write_8(GS_S_SMODE1_REG, smode1 | ((u_int64_t)1 << 16));
133 	_reg_write_8(GS_S_SYNCH1_REG, p->synch1);
134 	_reg_write_8(GS_S_SYNCH2_REG, p->synch2);
135 	_reg_write_8(GS_S_SYNCV_REG, p->syncv);
136 	_reg_write_8(GS_S_SMODE2_REG, p->smode2);
137 	_reg_write_8(GS_S_SRFSH_REG, p->srfsh);
140 		_reg_write_8(GS_S_SMODE1_REG, smode1 & ~((u_int64_t)1 << 16));
145 	_reg_write_8(GS_S_SMODE1_REG,
151 	_reg_write_8(GS_S_PMODE_REG, 0x66);
154 	_reg_write_8(GS_S_DISPLAY2_REG, p->display);
155 	_reg_write_8(GS_S_DISPFB2_REG, (p->w >> 6) << 9);
156 	_reg_write_8(GS_S_SMODE2_REG, p->smode2);
157 	_reg_write_8(GS_S_BGCOLOR_REG, 0);
160 	_reg_write_8(GS_S_CSR_REG, 1 << 8);