Cross Reference: /src/sys/arch/powerpc/booke/booke

Lines Matching refs:va
47 dcbf(vaddr_t va, vsize_t off)
49 	__asm volatile("dcbf\t%0,%1" : : "b" (va), "r" (off));
53 dcbst(vaddr_t va, vsize_t off)
55 	__asm volatile("dcbst\t%0,%1" : : "b" (va), "r" (off));
59 dcbi(vaddr_t va, vsize_t off)
61 	__asm volatile("dcbi\t%0,%1" : : "b" (va), "r" (off));
65 dcbz(vaddr_t va, vsize_t off)
67 	__asm volatile("dcbz\t%0,%1" : : "b" (va), "r" (off));
71 dcba(vaddr_t va, vsize_t off)
73 	__asm volatile("dcba\t%0,%1" : : "b" (va), "r" (off));
77 icbi(vaddr_t va, vsize_t off)
79 	__asm volatile("icbi\t%0,%1" : : "b" (va), "r" (off));
83 cache_op(vaddr_t va, vsize_t len, vsize_t line_size, enum cache_op op)
91 	len += va & (line_size - 1);
92 	va &= -line_size;
96 		case OP_DCBF: dcbf(va, i); break;
97 		case OP_DCBST: dcbst(va, i); break;
98 		case OP_DCBI: dcbi(va, i); break;
99 		case OP_DCBZ: dcbz(va, i); break;
100 		case OP_DCBA: dcba(va, i); break;
101 		case OP_ICBI: icbi(va, i); break;
109 dcache_wb_page(vaddr_t va)
111 	cache_op(va, PAGE_SIZE, curcpu()->ci_ci.dcache_line_size, OP_DCBST);
115 dcache_wbinv_page(vaddr_t va)
117 	cache_op(va, PAGE_SIZE, curcpu()->ci_ci.dcache_line_size, OP_DCBF);
121 dcache_inv_page(vaddr_t va)
123 	cache_op(va, PAGE_SIZE, curcpu()->ci_ci.dcache_line_size, OP_DCBI);
127 dcache_zero_page(vaddr_t va)
129 	cache_op(va, PAGE_SIZE, curcpu()->ci_ci.dcache_line_size, OP_DCBZ);
133 icache_inv_page(vaddr_t va)
136 	cache_op(va, PAGE_SIZE, curcpu()->ci_ci.icache_line_size, OP_ICBI);
142 dcache_wb(vaddr_t va, vsize_t len)
144 	cache_op(va, len, curcpu()->ci_ci.dcache_line_size, OP_DCBST);
148 dcache_wbinv(vaddr_t va, vsize_t len)
150 	cache_op(va, len, curcpu()->ci_ci.dcache_line_size, OP_DCBF);
154 dcache_inv(vaddr_t va, vsize_t len)
156 	cache_op(va, len, curcpu()->ci_ci.dcache_line_size, OP_DCBI);
160 icache_inv(vaddr_t va, vsize_t len)
163 	cache_op(va, len, curcpu()->ci_ci.icache_line_size, OP_ICBI);
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