Cross Reference: /src/sys/arch/powerpc/booke/dev/pq3gpio.c

Lines Matching refs:gc
85 	struct pq3gpio_group * const gc = v;
87 	uint32_t data = bus_space_read_4(gc->gc_bst, gc->gc_bsh, gc->gc_reg);
89 	return (data >> (gc->gc_pins[num].pin_num ^ 31)) & 1;
95 	struct pq3gpio_group * const gc = v;
96 	const u_int mask = 1 << (gc->gc_pins[num].pin_num ^ 31);
99 	u_int data = bus_space_read_4(gc->gc_bst, gc->gc_bsh, gc->gc_reg);
102 		bus_space_write_4(gc->gc_bst, gc->gc_bsh, gc->gc_reg, data);
120 	struct pq3gpio_group * const gc = v;
121 	const size_t shift = gc->gc_pins[num].pin_num ^ 31;
124 	    ((uint64_t)bus_space_read_4(gc->gc_bst, gc->gc_bsh, CPDIR1) << 32)
125 	    | (bus_space_read_4(gc->gc_bst, gc->gc_bsh, CPDIR2) << 0);
139 		bus_space_write_4(gc->gc_bst, gc->gc_bsh, CPDIR2,
144 		bus_space_write_4(gc->gc_bst, gc->gc_bsh, CPDIR1,
150 	uint32_t old_odr = bus_space_read_4(gc->gc_bst, gc->gc_bsh, CPODR);
161 		bus_space_write_4(gc->gc_bst, gc->gc_bsh, CPODR, new_odr);
172 	struct pq3gpio_group * const gc = v;
173 	const u_int mask = 1 << (gc->gc_pins[num].pin_num ^ 31);
175 	uint32_t old_dir = bus_space_read_4(gc->gc_bst, gc->gc_bsh, GPDIR);
183 		bus_space_write_4(gc->gc_bst, gc->gc_bsh, GPDIR, new_dir);
188 	uint32_t old_odr = bus_space_read_4(gc->gc_bst, gc->gc_bsh, GPODR);
198 		bus_space_write_4(gc->gc_bst, gc->gc_bsh, GPODR, new_odr);
207 	struct pq3gpio_group * const gc = kmem_zalloc(sizeof(*gc), KM_SLEEP);
209 	gc->gc_bst = bst;
210 	gc->gc_bsh = bsh;
211 	gc->gc_reg = reg;
212 	gc->gc_tag.gp_cookie = gc;
214 	gc->gc_tag.gp_gc_open = pq3gpio_gc_open;
215 	gc->gc_tag.gp_gc_close = pq3gpio_gc_close;
217 	gc->gc_tag.gp_pin_read = pq3gpio_pin_read;
218 	gc->gc_tag.gp_pin_write = pq3gpio_pin_write;
219 	gc->gc_tag.gp_pin_ctl = pin_ctl;
221 	u_int data = bus_space_read_4(gc->gc_bst, gc->gc_bsh, reg);
223 	gpio_pin_t *pin = gc->gc_pins;
235 		.gba_gc = &gc->gc_tag,
236 		.gba_pins = gc->gc_pins,
237 		.gba_npins = pin - gc->gc_pins,
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