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Lines Matching defs:pin_no

70 	u_int				 pin_no;
300 jh7110_set_function(struct jh7110_pinctrl_softc *sc, u_int pin_no,
303 	if (pin_no >= __arraycount(jh7110_sys_func_sel))
307 	    &jh7110_sys_func_sel[pin_no];
328 jh7110_set_gpiomux(struct jh7110_pinctrl_softc * const sc, u_int pin_no,
332 	const u_int offset = 4 * (pin_no / 4);
333 	const u_int shift = 8 * (pin_no % 4);
366 		dinval |= __SHIFTIN(pin_no + 2, din_mask);
554 		u_int pin_no;
558 			pin_no = p;
560 			    ", gpio %d doen %#x\n", group, pin_no,
561 			    RD4(sc, GPO_DOEN_CFG(pin_no)));
562 			WR4(sc, GPO_DOEN_CFG(pin_no), GPO_DISABLE);
563 			jh7110_padctl_rmw(sc, pin_no,
572 			pin_no = __SHIFTOUT(p, DT_PINMUX_PIN_MASK);
573 			jh7110_set_pinmux(sc, pin_no, din, dout,
611 	const u_int pin_no = be32toh(gpio[1]);
618 	pin->pin_no = pin_no;
642 	const u_int pin_no = pin ->pin_no;
645 	const bus_size_t offset = ((pin_no) / pins_per_bank) * banksz;
646 	const uint32_t mask = __BIT(pin_no % pins_per_bank);
663 	const u_int pin_no = pin ->pin_no;
668 	const bus_size_t offset = ((pin_no) / pins_per_bank) * banksz;
669 	const u_int shift = bits_per_pin * (pin_no % pins_per_bank);