Lines Matching refs:ide
407 unsigned ac97, ide, pcib, pmgt, usb12, usb34, val;
412 * 0.22.1 1106.0571 IDE (viaide)
419 ide = pcimaketag(0, 22, 1);
462 (void) pcicfgread(ide, 0x08);
469 unsigned ide, irq, net, pcib, steer, val;
473 ide = pcimaketag(0, 22, 1);
504 * //// IDE fixup ////
505 * - "native mode" (ide 0x09)
508 /* ide: 0x09 - programming interface; 1000'SsPp */
509 val = pcicfgread(ide, 0x08) & 0xffff00ff;
510 pcicfgwrite(ide, 0x08, val | (0x8f << 8));
512 /* ide: 0x10-20 - leave them PCI memory space assigned */
515 * //// IDE fixup ////
516 * - "compatibility mode" (ide 0x09)
517 * - remove PCI pin assignment (ide 0x3d)
520 /* ide: 0x09 - programming interface; 1000'SsPp */
521 val = pcicfgread(ide, 0x08) & 0xffff00ff;
523 pcicfgwrite(ide, 0x08, val);
525 /* ide: 0x10-20 */
527 * experiment shows writing ide: 0x09 changes these
529 * 0x8a at ide: 0x09 to make sure legacy IDE. Then
537 /* ide: 0x3d/3c - turn off PCI pin */
538 val = pcicfgread(ide, 0x3c) & 0xffff00ff;
539 pcicfgwrite(ide, 0x3c, val);
589 * 0.11.1 10ad.0105 IDE (slide)
596 unsigned ide, net, pcib, steer, val;
600 ide = pcimaketag(0, 11, 1);
623 * //// IDE fixup -- case A ////
624 * - "native PCI mode" (ide 0x09)
626 * - native IDE for both channels (ide 0x40)
627 * - LEGIRQ bit 11 steers interrupt to pin C (ide 0x40)
628 * - sign as PCI pin C line 11 (ide 0x3d/3c)
630 /* ide: 0x09 - programming interface; 1000'SsPp */
631 val = pcicfgread(ide, 0x08);
633 pcicfgwrite(ide, 0x08, val | (0x8f << 8));
635 /* pcib: 0x43 - IDE interrupt routing */
643 /* ide: 0x41/40 - IDE
644 val = pcicfgread(ide, 0x40) & 0xffff0000;
646 pcicfgwrite(ide, 0x40, val);
648 /* ide: 0x3d/3c - use PCI pin C/line 11 */
649 val = pcicfgread(ide, 0x3c) & 0xffffff00;
651 pcicfgwrite(ide, 0x3c, val);
654 * //// IDE fixup -- case B ////
655 * - "compatibility mode" (ide 0x09)
656 * - IDE primary/secondary interrupt routing (pcib 0x43)
658 * - no PCI pin/line assignment (ide 0x3d/3c)
660 /* ide: 0x09 - programming interface; 1000'SsPp */
661 val = pcicfgread(ide, 0x08);
663 pcicfgwrite(ide, 0x08, val | (0x8a << 8));
665 /* pcib: 0x43 - IDE interrupt routing */
669 /* ide: 0x45/44 - PCI interrupt routing */
670 val = pcicfgread(ide, 0x44) & 0xffff0000;
671 pcicfgwrite(ide, 0x44, val);
673 /* ide: 0x3d/3c - turn off PCI pin/line */
674 val = pcicfgread(ide, 0x3c) & 0xffff0000;
675 pcicfgwrite(ide, 0x3c, val);