Lines Matching refs:val
196 * [val in msecs, input clk in 0.1 MHz]
199 #define SBIC_TIMEOUT(val,clk) ((((val) * (clk)) / 800) + 1)
398 #define wd33c93_read_reg(sc, regno, val) \
401 (val) = *(volatile uint8_t *)(sc)->sc_data_regh; \
404 #define wd33c93_write_reg(sc, regno, val) \
407 *(volatile uint8_t *)(sc)->sc_data_regh = (val); \
410 #define SET_SBIC_myid(sc,val) wd33c93_write_reg(sc,SBIC_myid,val)
411 #define GET_SBIC_myid(sc,val) wd33c93_read_reg(sc,SBIC_myid,val)
412 #define SET_SBIC_cdbsize(sc,val) wd33c93_write_reg(sc,SBIC_cdbsize,val)
413 #define GET_SBIC_cdbsize(sc,val) wd33c93_read_reg(sc,SBIC_cdbsize,val)
414 #define SET_SBIC_control(sc,val) wd33c93_write_reg(sc,SBIC_control,val)
415 #define GET_SBIC_control(sc,val) wd33c93_read_reg(sc,SBIC_control,val)
416 #define SET_SBIC_timeo(sc,val) wd33c93_write_reg(sc,SBIC_timeo,val)
417 #define GET_SBIC_timeo(sc,val) wd33c93_read_reg(sc,SBIC_timeo,val)
418 #define SET_SBIC_cdb1(sc,val) wd33c93_write_reg(sc,SBIC_cdb1,val)
419 #define GET_SBIC_cdb1(sc,val) wd33c93_read_reg(sc,SBIC_cdb1,val)
420 #define SET_SBIC_cdb2(sc,val) wd33c93_write_reg(sc,SBIC_cdb2,val)
421 #define GET_SBIC_cdb2(sc,val) wd33c93_read_reg(sc,SBIC_cdb2,val)
422 #define SET_SBIC_cdb3(sc,val) wd33c93_write_reg(sc,SBIC_cdb3,val)
423 #define GET_SBIC_cdb3(sc,val) wd33c93_read_reg(sc,SBIC_cdb3,val)
424 #define SET_SBIC_cdb4(sc,val) wd33c93_write_reg(sc,SBIC_cdb4,val)
425 #define GET_SBIC_cdb4(sc,val) wd33c93_read_reg(sc,SBIC_cdb4,val)
426 #define SET_SBIC_cdb5(sc,val) wd33c93_write_reg(sc,SBIC_cdb5,val)
427 #define GET_SBIC_cdb5(sc,val) wd33c93_read_reg(sc,SBIC_cdb5,val)
428 #define SET_SBIC_cdb6(sc,val) wd33c93_write_reg(sc,SBIC_cdb6,val)
429 #define GET_SBIC_cdb6(sc,val) wd33c93_read_reg(sc,SBIC_cdb6,val)
430 #define SET_SBIC_cdb7(sc,val) wd33c93_write_reg(sc,SBIC_cdb7,val)
431 val) wd33c93_read_reg(sc,SBIC_cdb7,val)
432 #define SET_SBIC_cdb8(sc,val) wd33c93_write_reg(sc,SBIC_cdb8,val)
433 #define GET_SBIC_cdb8(sc,val) wd33c93_read_reg(sc,SBIC_cdb8,val)
434 #define SET_SBIC_cdb9(sc,val) wd33c93_write_reg(sc,SBIC_cdb9,val)
435 #define GET_SBIC_cdb9(sc,val) wd33c93_read_reg(sc,SBIC_cdb9,val)
436 #define SET_SBIC_cdb10(sc,val) wd33c93_write_reg(sc,SBIC_cdb10,val)
437 #define GET_SBIC_cdb10(sc,val) wd33c93_read_reg(sc,SBIC_cdb10,val)
438 #define SET_SBIC_cdb11(sc,val) wd33c93_write_reg(sc,SBIC_cdb11,val)
439 #define GET_SBIC_cdb11(sc,val) wd33c93_read_reg(sc,SBIC_cdb11,val)
440 #define SET_SBIC_cdb12(sc,val) wd33c93_write_reg(sc,SBIC_cdb12,val)
441 #define GET_SBIC_cdb12(sc,val) wd33c93_read_reg(sc,SBIC_cdb12,val)
442 #define SET_SBIC_tlun(sc,val) wd33c93_write_reg(sc,SBIC_tlun,val)
443 #define GET_SBIC_tlun(sc,val) wd33c93_read_reg(sc,SBIC_tlun,val)
444 #define SET_SBIC_cmd_phase(sc,val) wd33c93_write_reg(sc,SBIC_cmd_phase,val)
445 #define GET_SBIC_cmd_phase(sc,val) wd33c93_read_reg(sc,SBIC_cmd_phase,val)
446 #define SET_SBIC_syn(sc,val) wd33c93_write_reg(sc,SBIC_syn,val)
447 #define GET_SBIC_syn(sc,val) wd33c93_read_reg(sc,SBIC_syn,val)
448 #define SET_SBIC_count_hi(sc,val) wd33c93_write_reg(sc,SBIC_count_hi,val)
449 #define GET_SBIC_count_hi(sc,val) wd33c93_read_reg(sc,SBIC_count_hi,val)
450 #define SET_SBIC_count_med(sc,val) wd33c93_write_reg(sc,SBIC_count_med,val)
451 #define GET_SBIC_count_med(sc,val) wd33c93_read_reg(sc,SBIC_count_med,val)
452 #define SET_SBIC_count_lo(sc,val) wd33c93_write_reg(sc,SBIC_count_lo,val)
453 #define GET_SBIC_count_lo(sc,val) wd33c93_read_reg(sc,SBIC_count_lo,val)
454 #define SET_SBIC_selid(sc,val) wd33c93_write_reg(sc,SBIC_selid,val)
455 #define GET_SBIC_selid(sc,val) wd33c93_read_reg(sc,SBIC_selid,val)
456 #define SET_SBIC_rselid(sc,val) wd33c93_write_reg(sc,SBIC_rselid,val)
457 #define GET_SBIC_rselid(sc,val) wd33c93_read_reg(sc,SBIC_rselid,val)
458 #define SET_SBIC_csr(sc,val) wd33c93_write_reg(sc,SBIC_csr,val)
459 #define GET_SBIC_csr(sc,val) wd33c93_read_reg(sc,SBIC_csr,val)
460 #define SET_SBIC_cmd(sc,val) wd33c93_write_reg(sc,SBIC_cmd,val)
461 #define GET_SBIC_cmd(sc,val) wd33c93_read_reg(sc,SBIC_cmd,val)
462 #define SET_SBIC_data(sc,val) wd33c93_write_reg(sc,SBIC_data,val)
463 #define GET_SBIC_data(sc,val) wd33c93_read_reg(sc,SBIC_data,val)
464 #define SET_SBIC_queue_tag(sc,val) wd33c93_write_reg(sc,SBIC_queue_tag,val)
465 #define GET_SBIC_queue_tag(sc,val) wd33c93_read_reg(sc,SBIC_queue_tag,val)
467 #define SBIC_TC_PUT(sc, val) \
469 wd33c93_write_reg(sc, SBIC_count_hi, ((val) >> 16)); \
470 *(volatile uint8_t *)(sc)->sc_data_regh = (val) >> 8; \
471 *(volatile uint8_t *)(sc)->sc_data_regh = (val); \
474 #define GET_SBIC_asr(sc, val) \
476 (val) = *(volatile uint8_t *)(sc)->sc_asr_regh; \
Indexes created Sun Oct 19 22:09:57 GMT 2025