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Lines Matching refs:_reg_write_4

141 	_reg_write_4(SH4_BCR1, _reg_read_4(SH4_BCR1) | BCR1_BREQEN);
144 	_reg_write_4(SH4_PCICR, PCICR_BASE | PCICR_RSTCTL);
146 	_reg_write_4(SH4_PCICR, PCICR_BASE);
149 	_reg_write_4(SH4_PCICONF2,
154 	_reg_write_4(SH4_PCIBCR1, PCIBCR_BCR1_VAL);
156 	_reg_write_4(SH4_PCIBCR1, _reg_read_4(SH4_BCR1) | BCR1_MASTER);
159 	_reg_write_4(SH4_PCIBCR2, PCIBCR_BCR2_VAL);
161 	_reg_write_4(SH4_PCIBCR2, _reg_read_2(SH4_BCR2));
166 		_reg_write_4(SH4_PCIBCR3, PCIBCR_BCR3_VAL);
168 		_reg_write_4(SH4_PCIBCR3, _reg_read_2(SH4_BCR3));
173 	_reg_write_4(SH4_PCIWCR1, PCIBCR_WCR1_VAL);
175 	_reg_write_4(SH4_PCIWCR1, _reg_read_4(SH4_WCR1));
178 	_reg_write_4(SH4_PCIWCR2, PCIBCR_WCR2_VAL);
180 	_reg_write_4(SH4_PCIWCR2, _reg_read_4(SH4_WCR2));
183 	_reg_write_4(SH4_PCIWCR3, PCIBCR_WCR3_VAL);
185 	_reg_write_4(SH4_PCIWCR3, _reg_read_4(SH4_WCR3));
188 	_reg_write_4(SH4_PCIMCR, PCIBCR_MCR_VAL);
190 	_reg_write_4(SH4_PCIMCR, _reg_read_4(SH4_MCR));
195 	_reg_write_4(SH4_PCIIOBR, SH4_PCIC_IO);
196 	_reg_write_4(SH4_PCIMBR, SH4_PCIC_MEM);
199 	_reg_write_4(SH4_PCILSR0, (64 - 1) << 20);
200 	_reg_write_4(SH4_PCILAR0, 0xac000000);
201 	_reg_write_4(SH4_PCICONF5, 0xac000000);
204 	_reg_write_4(SH4_PCILSR1, (64 - 1) << 20);
205 	_reg_write_4(SH4_PCILAR1, 0xac000000);
206 	_reg_write_4(SH4_PCICONF6, 0x8c000000);
209 	_reg_write_4(SH4_PCICONF1, PCI_COMMAND_IO_ENABLE
216 	_reg_write_4(SH4_PCICR, PCICR_BASE | PCICR_CFINIT);
296 	_reg_write_4(SH4_PCIPAR, tag | reg);
298 	_reg_write_4(SH4_PCIPAR, 0);
313 	_reg_write_4(SH4_PCIPAR, tag | reg);
314 	_reg_write_4(SH4_PCIPDR, data);
315 	_reg_write_4(SH4_PCIPAR, 0);