Lines Matching refs:offset
401 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
404 *nbshp = bsh + offset;
439 bus_size_t offset);
441 bus_size_t offset);
443 bus_size_t offset);
445 bus_size_t offset);
447 bus_size_t offset);
449 bus_size_t offset);
452 __shpcic_io_read_1(bus_space_handle_t bsh, bus_size_t offset)
454 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
460 __shpcic_io_read_2(bus_space_handle_t bsh, bus_size_t offset)
462 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
468 __shpcic_io_read_4(bus_space_handle_t bsh, bus_size_t offset)
470 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
476 __shpcic_mem_read_1(bus_space_handle_t bsh, bus_size_t offset)
478 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
484 __shpcic_mem_read_2(bus_space_handle_t bsh, bus_size_t offset)
486 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
492 __shpcic_mem_read_4(bus_space_handle_t bsh, bus_size_t offset)
494 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
503 shpcic_io_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
507 value = __shpcic_io_read_1(bsh, offset);
513 shpcic_io_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
517 value = __shpcic_io_read_2(bsh, offset);
523 shpcic_io_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
527 value = __shpcic_io_read_4(bsh, offset);
533 shpcic_mem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
537 value = __shpcic_mem_read_1(bsh, offset);
543 shpcic_mem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
547 value = __shpcic_mem_read_2(bsh, offset);
553 shpcic_mem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
557 value = __shpcic_mem_read_4(bsh, offset);
567 bus_size_t offset, uint8_t *addr, bus_size_t count)
571 *addr++ = __shpcic_io_read_1(bsh, offset);
577 bus_size_t offset, uint16_t *addr, bus_size_t count)
581 *addr++ = __shpcic_io_read_2(bsh, offset);
587 bus_size_t offset, uint32_t *addr, bus_size_t count)
591 *addr++ = __shpcic_io_read_4(bsh, offset);
597 bus_size_t offset, uint8_t *addr, bus_size_t count)
601 *addr++ = __shpcic_mem_read_1(bsh, offset);
607 bus_size_t offset, uint16_t *addr, bus_size_t count)
611 *addr++ = __shpcic_mem_read_2(bsh, offset);
617 bus_size_t offset, uint32_t *addr, bus_size_t count)
621 *addr++ = __shpcic_mem_read_4(bsh, offset);
631 bus_size_t offset, uint8_t *addr, bus_size_t count)
635 *addr++ = __shpcic_io_read_1(bsh, offset);
636 offset += 1;
642 bus_size_t offset, uint16_t *addr, bus_size_t count)
646 *addr++ = __shpcic_io_read_2(bsh, offset);
647 offset += 2;
653 bus_size_t offset, uint32_t *addr, bus_size_t count)
657 *addr++ = __shpcic_io_read_4(bsh, offset);
658 offset += 4;
664 bus_size_t offset, uint8_t *addr, bus_size_t count)
668 *addr++ = __shpcic_mem_read_1(bsh, offset);
669 offset += 1;
675 bus_size_t offset, uint16_t *addr, bus_size_t count)
679 *addr++ = __shpcic_mem_read_2(bsh, offset);
680 offset += 2;
686 bus_size_t offset, uint32_t *addr, bus_size_t count)
690 *addr++ = __shpcic_mem_read_4(bsh, offset);
691 offset += 4;
697 bus_size_t offset, uint8_t value);
699 bus_size_t offset, uint16_t value);
701 bus_size_t offset, uint32_t value);
703 bus_size_t offset, uint8_t value);
705 bus_size_t offset, uint16_t value);
707 bus_size_t offset, uint32_t value);
710 __shpcic_io_write_1(bus_space_handle_t bsh, bus_size_t offset,
713 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
719 __shpcic_io_write_2(bus_space_handle_t bsh, bus_size_t offset,
722 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
728 __shpcic_io_write_4(bus_space_handle_t bsh, bus_size_t offset,
731 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
737 __shpcic_mem_write_1(bus_space_handle_t bsh, bus_size_t offset,
740 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
746 __shpcic_mem_write_2(bus_space_handle_t bsh, bus_size_t offset,
749 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
755 __shpcic_mem_write_4(bus_space_handle_t bsh, bus_size_t offset,
758 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
768 bus_size_t offset, uint8_t value)
771 __shpcic_io_write_1(bsh, offset, value);
776 bus_size_t offset, uint16_t value)
779 __shpcic_io_write_2(bsh, offset, value);
784 bus_size_t offset, uint32_t value)
787 __shpcic_io_write_4(bsh, offset, value);
792 bus_size_t offset, uint8_t value)
795 __shpcic_mem_write_1(bsh, offset, value);
800 bus_size_t offset, uint16_t value)
803 __shpcic_mem_write_2(bsh, offset, value);
808 bus_size_t offset, uint32_t value)
811 __shpcic_mem_write_4(bsh, offset, value);
819 bus_size_t offset, const uint8_t *addr, bus_size_t count)
823 __shpcic_io_write_1(bsh, offset, *addr++);
829 bus_size_t offset, const uint16_t *addr, bus_size_t count)
833 __shpcic_io_write_2(bsh, offset, *addr++);
839 bus_size_t offset, const uint32_t *addr, bus_size_t count)
843 __shpcic_io_write_4(bsh, offset, *addr++);
849 bus_size_t offset, const uint8_t *addr, bus_size_t count)
853 __shpcic_mem_write_1(bsh, offset, *addr++);
859 bus_size_t offset, const uint16_t *addr, bus_size_t count)
863 __shpcic_mem_write_2(bsh, offset, *addr++);
869 bus_size_t offset, const uint32_t *addr, bus_size_t count)
873 __shpcic_mem_write_4(bsh, offset, *addr++);
882 bus_size_t offset, const uint8_t *addr, bus_size_t count)
886 __shpcic_io_write_1(bsh, offset, *addr++);
887 offset += 1;
893 bus_size_t offset, const uint16_t *addr, bus_size_t count)
897 __shpcic_io_write_2(bsh, offset, *addr++);
898 offset += 2;
904 bus_size_t offset, const uint32_t *addr, bus_size_t count)
908 __shpcic_io_write_4(bsh, offset, *addr++);
909 offset += 4;
915 bus_size_t offset, const uint8_t *addr, bus_size_t count)
919 __shpcic_mem_write_1(bsh, offset, *addr++);
920 offset += 1;
926 bus_size_t offset, const uint16_t *addr, bus_size_t count)
930 __shpcic_mem_write_2(bsh, offset, *addr++);
931 offset += 2;
937 bus_size_t offset, const uint32_t *addr, bus_size_t count)
941 __shpcic_mem_write_4(bsh, offset, *addr++);
942 offset += 4;
951 bus_size_t offset, uint8_t value, bus_size_t count)
955 __shpcic_io_write_1(bsh, offset, value);
961 bus_size_t offset, uint16_t value, bus_size_t count)
965 __shpcic_io_write_2(bsh, offset, value);
971 bus_size_t offset, uint32_t value, bus_size_t count)
975 __shpcic_io_write_4(bsh, offset, value);
981 bus_size_t offset, uint8_t value, bus_size_t count)
985 __shpcic_mem_write_1(bsh, offset, value);
991 bus_size_t offset, uint16_t value, bus_size_t count)
995 __shpcic_mem_write_2(bsh, offset, value);
1001 bus_size_t offset, uint32_t value, bus_size_t count)
1005 __shpcic_mem_write_4(bsh, offset, value);
1014 bus_size_t offset, uint8_t value, bus_size_t count)
1018 __shpcic_io_write_1(bsh, offset, value);
1019 offset += 1;
1025 bus_size_t offset, uint16_t value, bus_size_t count)
1029 __shpcic_io_write_2(bsh, offset, value);
1030 offset += 2;
1036 bus_size_t offset, uint32_t value, bus_size_t count)
1040 __shpcic_io_write_4(bsh, offset, value);
1041 offset += 4;
1047 bus_size_t offset, uint8_t value, bus_size_t count)
1051 __shpcic_mem_write_1(bsh, offset, value);
1052 offset += 1;
1058 bus_size_t offset, uint16_t value, bus_size_t count)
1062 __shpcic_mem_write_2(bsh, offset, value);
1063 offset += 2;
1069 bus_size_t offset, uint32_t value, bus_size_t count)
1073 __shpcic_mem_write_4(bsh, offset, value);
1074 offset += 4;
Indexes created Tue Oct 14 08:09:56 GMT 2025