Cross Reference: /src/sys/arch/sh3/sh3/interrupt.c

Lines Matching refs:evtcode
55  * EVTCODE to intc_intrhand mapper.
109 intc_intr_establish(int evtcode, int trigger, int level,
114 	KDASSERT(evtcode >= 0x200 && level > 0);
120 	ih->ih_evtcode	= evtcode;
123 	EVTCODE_TO_IH_INDEX(evtcode) = ih->ih_idx;
126 	intc_intr_priority(evtcode, level);
137 	int evtcode = ih->ih_evtcode;
140 	intc_intr_priority(evtcode, 0);
143 	EVTCODE_TO_IH_INDEX(evtcode) = 0;
149 intc_intr_disable(int evtcode)
154 	KASSERT(EVTCODE_TO_IH_INDEX(evtcode) != 0); /* there is a handler */
155 	switch (evtcode) {
157 		intc_intr_priority(evtcode, 0);
171 		intpri_intr_disable(evtcode);
179 intc_intr_enable(int evtcode)
185 	KASSERT(EVTCODE_TO_IH_INDEX(evtcode) != 0); /* there is a handler */
186 	switch (evtcode) {
188 		ih = EVTCODE_IH(evtcode);
190 		intc_intr_priority(evtcode, (ih->ih_level >> 4));
204 		intpri_intr_enable(evtcode);
213  * int intc_intr_priority(int evtcode, int level)
215  *	SH7708, SH7708S, SH7708R, SH7750, SH7750S ... evtcode is INTEVT
216  *	SH7709, SH7709A, SH7706			  ... evtcode is INTEVT2
219 intc_intr_priority(int evtcode, int level)
246 	switch (evtcode) {
269 		switch (evtcode) {
321 		switch (evtcode) {
341 			intpri_intr_priority(evtcode, level);
409 intpri_intr_priority(int evtcode, int level)
430 	switch (evtcode) {
464 intpri_intr_enable(int evtcode)
484 	switch (evtcode) {
493 		bit = (1 << ((evtcode - SH4_INTEVT_PCISERR) >> 5));
513 intpri_intr_disable(int evtcode)
533 	switch (evtcode) {
542 		bit = (1 << ((evtcode - SH4_INTEVT_PCISERR) >> 5));
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