Lines Matching refs:sreg
218 #define SX_ST(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
219 SX_LONG | (sreg << 7) | (o))
220 #define SX_STM(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_MASK | \
221 SX_LONG | (sreg << 7) | (o))
222 #define SX_STB(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
223 SX_UBYTE_0 | (sreg << 7) | (o))
224 #define SX_STBM(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_MASK | \
225 SX_UBYTE_0 | (sreg << 7) | (o))
226 #define SX_STBC(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_CLAMP | \
227 SX_UBYTE_0 | (sreg << 7) | (o))
228 #define SX_STW(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
229 SX_USHORT_0 | (sreg << 7) | (o))
230 #define SX_STP(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
231 SX_PACKED | (sreg << 7) | (o))
232 #define SX_STPS(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_SELECT | \
233 SX_PACKED | (sreg << 7) | (o))
234 #define SX_STS(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_SELECT \
235 | SX_LONG | (sreg << 7) | (o))
238 #define SX_STUQ0(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
239 SX_UQUAD_0 | (sreg << 7) | (o))
240 #define SX_STUQ0C(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_CLAMP | \
241 SX_UQUAD_0 | (sreg << 7) | (o))
242 #define SX_STUQ8(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
243 SX_UQUAD_8 | (sreg << 7) | (o))
244 #define SX_STUQ16(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
245 SX_UQUAD_16 | (sreg << 7) | (o))
246 #define SX_STUQ24(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
247 SX_UQUAD_24 | (sreg << 7) | (o))
248 #define SX_STUC0(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
249 SX_UCHAN_0 | (sreg << 7) | (o))
250 #define SX_STUC0C(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_CLAMP | \
251 SX_UCHAN_0 | (sreg << 7) | (o))
252 #define SX_STUC8(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
253 SX_UCHAN_8 | (sreg << 7) | (o))
254 #define SX_STUC16(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
255 SX_UCHAN_16 | (sreg << 7) | (o))
256 #define SX_STUC24(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
257 SX_UCHAN_24 | (sreg << 7) | (o))