Lines Matching defs:fdc
1 /* $NetBSD: fdc.c,v 1.52 2023/09/02 05:51:57 jdc Exp $ */
104 __KERNEL_RCSID(0, "$NetBSD: fdc.c,v 1.52 2023/09/02 05:51:57 jdc Exp $");
484 establish_chip_type(struct fdc_softc *fdc,
531 fdc->sc_flags |= FDC_82077;
544 * the drive). If `fdc' is not NULL, the drive was found but was not
550 fdprint(void *aux, const char *fdc)
554 if (!fdc)
560 * Configure several parameters and features on the FDC.
564 fdconf(struct fdc_softc *fdc)
568 if (fdc_wrfifo(fdc, NE7CMD_DUMPREG) || fdcresult(fdc) != 10)
575 if ((vroom = fdc->sc_status[7]) == 0)
579 if (fdc_wrfifo(fdc, NE7CMD_CFG) != 0)
581 if (fdc_wrfifo(fdc, vroom) != 0)
583 if (fdc_wrfifo(fdc, fdc->sc_cfg) != 0)
585 if (fdc_wrfifo(fdc, 0) != 0) /* PRETRK */
589 if ((fdc->sc_flags & FDC_82077) != 0) {
591 if (fdc_wrfifo(fdc, NE7CMD_LOCK | CFG_LOCK) != 0 ||
592 fdcresult(fdc) != 1) {
602 if (fdc_wrfifo(fdc, NE7CMD_VERSION) == 0 &&
603 fdcresult(fdc) == 1 && fdc->sc_status[0] == 0x90) {
614 struct fdc_softc *fdc = device_private(self);
617 fdc->sc_dev = self;
618 fdc->sc_bustag = ma->ma_bustag;
625 &fdc->sc_handle) != 0) {
630 establish_chip_type(fdc,
634 fdc->sc_handle);
636 if (fdcattach(fdc, ma->ma_pri) != 0)
637 bus_space_unmap(ma->ma_bustag, fdc->sc_handle, ma->ma_size);
643 struct fdc_softc *fdc = device_private(self);
652 fdc->sc_dev = self;
653 fdc->sc_bustag = sa->sa_bustag;
657 BUS_SPACE_MAP_LINEAR, &fdc->sc_handle) != 0) {
662 establish_chip_type(fdc,
666 fdc->sc_handle);
673 if (fdcattach(fdc, sa->sa_pri) != 0)
674 bus_space_unmap(sa->sa_bustag, fdc->sc_handle, sa->sa_size);
682 struct fdc_softc *fdc = device_private(self);
695 fdc->sc_dev = self;
696 fdc->sc_bustag = sa->sa_bustag;
699 sa->sa_size, 0, &fdc->sc_handle) != 0) {
704 establish_chip_type(fdc,
708 fdc->sc_handle);
716 fdc->sc_flags |= FDC_NOEJECT;
719 if (fdcattach(fdc, sa->sa_pri) != 0)
720 bus_space_unmap(sa->sa_bustag, fdc->sc_handle, sa->sa_size);
726 struct fdc_softc *fdc = device_private(self);
741 fdc->sc_dev = self;
742 fdc->sc_bustag = ea->ea_bustag;
746 ea->ea_vaddr[0], &fdc->sc_handle);
748 } else if (bus_space_map(fdc->sc_bustag,
750 ea->ea_reg[0].size, 0, &fdc->sc_handle) == 0) {
757 establish_chip_type(fdc,
758 fdc->sc_bustag,
762 fdc->sc_handle);
764 fdc->sc_flags |= FDC_EBUS;
767 fdc->sc_flags |= FDC_NOEJECT;
769 if (fdcattach(fdc, ea->ea_intr[0]) != 0)
771 bus_space_unmap(ea->ea_bustag, fdc->sc_handle,
777 fdcattach(struct fdc_softc *fdc, int pri)
783 callout_init(&fdc->sc_timo_ch, 0);
784 callout_init(&fdc->sc_intr_ch, 0);
786 fdc->sc_state = DEVIDLE;
787 fdc->sc_itask = FDC_ITASK_NONE;
788 fdc->sc_istatus = FDC_ISTATUS_NONE;
789 fdc->sc_flags |= FDC_EIS;
790 TAILQ_INIT(&fdc->sc_drives);
792 if ((fdc->sc_flags & FDC_82077) != 0) {
793 fdc->sc_reg_msr = FDREG77_MSR;
794 fdc->sc_reg_fifo = FDREG77_FIFO;
795 fdc->sc_reg_dor = FDREG77_DOR;
796 fdc->sc_reg_dir = FDREG77_DIR;
798 fdc->sc_flags |= FDC_NEEDMOTORWAIT;
800 fdc->sc_reg_msr = FDREG72_MSR;
801 fdc->sc_reg_fifo = FDREG72_FIFO;
802 fdc->sc_reg_dor = 0;
810 fdc->sc_cfg = CFG_EIS|/*CFG_EFIFO|*/CFG_POLL|(8 & CFG_THRHLD_MASK);
811 if (fdconf(fdc) != 0) {
816 fdc->sc_sicookie = softint_establish(SOFTINT_BIO, fdcswintr, fdc);
817 if (fdc->sc_sicookie == NULL) {
819 aprint_error_dev(fdc->sc_dev,
821 callout_stop(&fdc->sc_timo_ch);
822 callout_stop(&fdc->sc_intr_ch);
829 if (fdc->sc_flags & FDC_NOEJECT)
835 fdciop = &fdc->sc_io;
836 if (bus_intr_establish2(fdc->sc_bustag, pri, 0,
837 fdc_c_hwintr, fdc, fdchwintr) == NULL) {
839 if (bus_intr_establish(fdc->sc_bustag, pri, IPL_BIO,
840 fdc_c_hwintr, fdc) == NULL) {
843 aprint_error_dev(fdc->sc_dev,
845 callout_stop(&fdc->sc_timo_ch);
846 callout_stop(&fdc->sc_intr_ch);
847 softint_disestablish(fdc->sc_sicookie);
851 evcnt_attach_dynamic(&fdc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
852 device_xname(fdc->sc_dev), "intr");
859 if (config_found(fdc->sc_dev, (void *)&fa, fdprint,
875 struct fdc_softc *fdc = device_private(parent);
876 bus_space_tag_t t = fdc->sc_bustag;
877 bus_space_handle_t h = fdc->sc_handle;
886 if ((fdc->sc_flags & FDC_82077) != 0) {
888 bus_space_write_1(t, h, fdc->sc_reg_dor,
897 fdc->sc_nstat = 0;
898 fdc_wrfifo(fdc, NE7CMD_RECAL);
899 fdc_wrfifo(fdc, drive);
906 v = bus_space_read_1(t, h, fdc->sc_reg_msr);
910 if (fdc_wrfifo(fdc, NE7CMD_SENSEI))
912 if (fdcresult(fdc) == 1 && fdc->sc_status[0] == 0x80)
922 n = fdc->sc_nstat;
928 printf(" 0x%x", fdc->sc_status[i]);
932 ok = (n == 2 && (fdc->sc_status[0] & 0xf8) == 0x20) ? 1 : 0;
935 if ((fdc->sc_flags & FDC_82077) != 0) {
937 bus_space_write_1(t, h, fdc->sc_reg_dor, FDO_FRST | FDO_DS);
953 struct fdc_softc *fdc = device_private(parent);
975 fdc->sc_fd[drive] = fd;
977 fdc_wrfifo(fdc, NE7CMD_SPECIFY);
978 fdc_wrfifo(fdc, type->steprate);
980 fdc_wrfifo(fdc, 6 | NE7_SPECIFY_NODMA);
1090 struct fdc_softc *fdc = device_private(
1092 if (fdc->sc_state == DEVIDLE) {
1094 fdcstart(fdc);
1109 struct fdc_softc *fdc = device_private(device_parent(fd->sc_dev));
1110 int active = fdc->sc_drives.tqh_first != 0;
1114 TAILQ_INSERT_TAIL(&fdc->sc_drives, fd, sc_drivechain);
1118 fdcstart(fdc);
1124 struct fdc_softc *fdc = device_private(device_parent(fd->sc_dev));
1135 TAILQ_REMOVE(&fdc->sc_drives, fd, sc_drivechain);
1137 TAILQ_INSERT_TAIL(&fdc->sc_drives, fd, sc_drivechain);
1147 fdc->sc_state = DEVIDLE;
1151 fdc_reset(struct fdc_softc *fdc)
1153 bus_space_tag_t t = fdc->sc_bustag;
1154 bus_space_handle_t h = fdc->sc_handle;
1156 if ((fdc->sc_flags & FDC_82077) != 0) {
1157 bus_space_write_1(t, h, fdc->sc_reg_dor,
1161 bus_space_write_1(t, h, fdc->sc_reg_drs, DRS_RESET);
1163 bus_space_write_1(t, h, fdc->sc_reg_drs, 0);
1165 if ((fdc->sc_flags & FDC_82077) != 0) {
1166 bus_space_write_1(t, h, fdc->sc_reg_dor,
1171 printf("fdc reset\n");
1176 fd_set_motor(struct fdc_softc *fdc)
1182 if ((fdc->sc_flags & FDC_82077) != 0) {
1184 if ((fd = fdc->sc_drives.tqh_first) != NULL)
1188 if ((fd = fdc->sc_fd[n]) && (fd->sc_flags & FD_MOTOR))
1190 bus_space_write_1(fdc->sc_bustag, fdc->sc_handle,
1191 fdc->sc_reg_dor, status);
1196 if ((fd = fdc->sc_fd[n]) != NULL &&
1223 struct fdc_softc *fdc = device_private(device_parent(fd->sc_dev));
1228 if ((fdc->sc_drives.tqh_first == fd) && (fdc->sc_state == MOTORWAIT))
1229 (void)fdcstate(fdc);
1234 * Get status bytes off the FDC
1239 fdcresult(struct fdc_softc *fdc)
1241 bus_space_tag_t t = fdc->sc_bustag;
1242 bus_space_handle_t h = fdc->sc_handle;
1246 uint8_t v = bus_space_read_1(t, h, fdc->sc_reg_msr);
1249 return fdc->sc_nstat = n;
1251 if (n >= sizeof(fdc->sc_status)) {
1255 fdc->sc_status[n++] =
1256 bus_space_read_1(t, h, fdc->sc_reg_fifo);
1262 return fdc->sc_nstat = -1;
1266 * Write a command byte to the FDC.
1270 fdc_wrfifo(struct fdc_softc *fdc, uint8_t x)
1272 bus_space_tag_t t = fdc->sc_bustag;
1273 bus_space_handle_t h = fdc->sc_handle;
1277 uint8_t v = bus_space_read_1(t, h, fdc->sc_reg_msr);
1280 bus_space_write_1(t, h, fdc->sc_reg_fifo, x);
1289 fdc_diskchange(struct fdc_softc *fdc)
1293 if (CPU_ISSUN4M && (fdc->sc_flags & FDC_82077) != 0) {
1295 bus_space_tag_t t = fdc->sc_bustag;
1296 bus_space_handle_t h = fdc->sc_handle;
1297 uint8_t v = bus_space_read_1(t, h, fdc->sc_reg_dir);
1391 fdcstart(struct fdc_softc *fdc)
1397 if (fdc->sc_state != DEVIDLE) {
1402 (void)fdcstate(fdc);
1406 fdcpstatus(struct fdc_softc *fdc)
1410 snprintb(bits, sizeof(bits), NE7_ST0BITS, fdc->sc_status[0]);
1412 snprintb(bits, sizeof(bits), NE7_ST1BITS, fdc->sc_status[1]);
1414 snprintb(bits, sizeof(bits), NE7_ST2BITS, fdc->sc_status[2]);
1417 fdc->sc_status[3], fdc->sc_status[4], fdc->sc_status[5]);
1421 fdcstatus(struct fdc_softc *fdc, const char *s)
1423 struct fd_softc *fd = fdc->sc_drives.tqh_first;
1428 n = fdc->sc_nstat;
1435 if (n == 0 && (fdc->sc_flags & FDC_82077) != 0) {
1436 fdc_wrfifo(fdc, NE7CMD_SENSEI);
1437 (void)fdcresult(fdc);
1443 fd ? device_xname(fd->sc_dev) : "fdc", s, fdc->sc_state);
1450 snprintb(bits, sizeof(bits), NE7_ST0BITS, fdc->sc_status[0]);
1451 printf(" (st0 %s cyl %d)\n", bits, fdc->sc_status[1]);
1454 fdcpstatus(fdc);
1467 struct fdc_softc *fdc = arg;
1472 fd = fdc->sc_drives.tqh_first;
1474 aprint_error_dev(fdc->sc_dev, "timeout but no I/O pending: state %d, istatus=%d\n",
1475 fdc->sc_state, fdc->sc_istatus);
1476 fdc->sc_state = DEVIDLE;
1481 fdc->sc_state++;
1483 fdc->sc_state = DEVIDLE;
1485 (void)fdcstate(fdc);
1494 struct fdc_softc *fdc = arg;
1499 (void)fdcstate(fdc);
1514 struct fdc_softc *fdc = arg;
1515 bus_space_tag_t t = fdc->sc_bustag;
1516 bus_space_handle_t h = fdc->sc_handle;
1518 switch (fdc->sc_itask) {
1522 if (fdc_wrfifo(fdc, NE7CMD_SENSEI) != 0 || fdcresult(fdc) == -1)
1523 fdc->sc_istatus = FDC_ISTATUS_ERROR;
1525 fdc->sc_istatus = FDC_ISTATUS_DONE;
1526 softint_schedule(fdc->sc_sicookie);
1529 if (fdcresult(fdc) == -1)
1530 fdc->sc_istatus = FDC_ISTATUS_ERROR;
1532 fdc->sc_istatus = FDC_ISTATUS_DONE;
1533 softint_schedule(fdc->sc_sicookie);
1539 printf("fdc: stray hard interrupt: itask=%d\n", fdc->sc_itask);
1540 fdc->sc_istatus = FDC_ISTATUS_SPURIOUS;
1541 softint_schedule(fdc->sc_sicookie);
1551 msr = bus_space_read_1(t, h, fdc->sc_reg_msr);
1559 fdcresult(fdc);
1560 fdc->sc_istatus = FDC_ISTATUS_DONE;
1561 softint_schedule(fdc->sc_sicookie);
1565 if (fdc->sc_tc == 0)
1568 panic("fdc: overrun");
1572 *fdc->sc_data =
1573 bus_space_read_1(t, h, fdc->sc_reg_fifo);
1575 bus_space_write_1(t, h, fdc->sc_reg_fifo,
1576 *fdc->sc_data);
1578 fdc->sc_data++;
1579 if (--fdc->sc_tc == 0) {
1590 struct fdc_softc *fdc = arg;
1592 if (fdc->sc_istatus == FDC_ISTATUS_NONE)
1596 switch (fdc->sc_istatus) {
1598 printf("fdc: ierror status: state %d\n", fdc->sc_state);
1601 printf("fdc: spurious interrupt: state %d\n", fdc->sc_state);
1605 fdcstate(fdc);
1610 fdcstate(struct fdc_softc *fdc)
1613 #define st0 fdc->sc_status[0]
1614 #define st1 fdc->sc_status[1]
1615 #define cyl fdc->sc_status[1]
1616 #define FDC_WRFIFO(fdc, c) do { \
1617 if (fdc_wrfifo(fdc, (c))) { \
1628 if (fdc->sc_istatus == FDC_ISTATUS_ERROR) {
1630 if (fdc->sc_state != RESETCOMPLETE &&
1631 fdc->sc_state != RECALWAIT &&
1632 fdc->sc_state != RECALCOMPLETE)
1633 fdc->sc_state = DORESET;
1637 fdc->sc_istatus = FDC_ISTATUS_NONE;
1638 fdc->sc_itask = FDC_ITASK_NONE;
1642 fd = fdc->sc_drives.tqh_first;
1644 fdc->sc_state = DEVIDLE;
1652 TAILQ_REMOVE(&fdc->sc_drives, fd, sc_drivechain);
1660 switch (fdc->sc_state) {
1662 fdc->sc_errors = 0;
1668 fdc->sc_state = MOTORWAIT;
1673 struct fd_softc *ofd = fdc->sc_fd[fd->sc_drive ^ 1];
1679 fd_set_motor(fdc);
1680 fdc->sc_state = MOTORWAIT;
1681 if ((fdc->sc_flags & FDC_NEEDMOTORWAIT) != 0) { /*XXX*/
1692 fd_set_motor(fdc);
1694 if (fdc_diskchange(fdc))
1700 if ((fdc->sc_flags & FDC_EIS) &&
1711 fdc->sc_state = SEEKWAIT;
1712 fdc->sc_nstat = 0;
1717 callout_reset(&fdc->sc_timo_ch, 4 * hz, fdctimeout, fdc);
1720 FDC_WRFIFO(fdc, NE7CMD_SPECIFY);
1721 FDC_WRFIFO(fdc, fd->sc_type->steprate);
1723 FDC_WRFIFO(fdc, 6 | NE7_SPECIFY_NODMA);
1725 fdc->sc_itask = FDC_ITASK_SENSEI;
1727 FDC_WRFIFO(fdc, NE7CMD_SEEK);
1728 FDC_WRFIFO(fdc, fd->sc_drive); /* drive number */
1729 FDC_WRFIFO(fdc, bp->b_cylinder * fd->sc_type->step);
1739 callout_reset(&fdc->sc_timo_ch, 4 * hz, fdctimeout, fdc);
1741 fdc->sc_nstat = 0;
1742 fdc->sc_state = DSKCHGWAIT;
1744 fdc->sc_itask = FDC_ITASK_SENSEI;
1746 FDC_WRFIFO(fdc, NE7CMD_SEEK);
1747 FDC_WRFIFO(fdc, fd->sc_drive); /* drive number */
1748 FDC_WRFIFO(fdc, 1 * fd->sc_type->step);
1752 callout_stop(&fdc->sc_timo_ch);
1754 if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 ||
1756 fdcstatus(fdc, "dskchg seek failed");
1757 fdc->sc_state = DORESET;
1759 fdc->sc_state = DORECAL;
1761 if (fdc_diskchange(fdc)) {
1762 aprint_error_dev(fdc->sc_dev,
1764 fdc->sc_state = DORESET;
1797 fdc->sc_data = (char *)bp->b_data + fd->sc_skip;
1798 fdc->sc_tc = fd->sc_nbytes;
1800 bus_space_write_1(fdc->sc_bustag, fdc->sc_handle,
1801 fdc->sc_reg_drs, type->rate);
1810 fdc->sc_state = IOCOMPLETE;
1811 fdc->sc_itask = FDC_ITASK_DMA;
1812 fdc->sc_nstat = 0;
1817 callout_reset(&fdc->sc_timo_ch, 3 * hz, fdctimeout, fdc);
1821 FDC_WRFIFO(fdc, NE7CMD_FORMAT);
1822 FDC_WRFIFO(fdc, (head << 2) | fd->sc_drive);
1823 FDC_WRFIFO(fdc, finfo->fd_formb_secshift);
1824 FDC_WRFIFO(fdc, finfo->fd_formb_nsecs);
1825 FDC_WRFIFO(fdc, finfo->fd_formb_gaplen);
1826 FDC_WRFIFO(fdc, finfo->fd_formb_fillbyte);
1829 FDC_WRFIFO(fdc, NE7CMD_READ);
1831 FDC_WRFIFO(fdc, NE7CMD_WRITE);
1832 FDC_WRFIFO(fdc, (head << 2) | fd->sc_drive);
1833 FDC_WRFIFO(fdc, fd->sc_cylin); /*track*/
1834 FDC_WRFIFO(fdc, head);
1835 FDC_WRFIFO(fdc, sec + 1); /*sector+1*/
1836 FDC_WRFIFO(fdc, type->secsize); /*sector size*/
1837 FDC_WRFIFO(fdc, type->sectrac); /*secs/track*/
1838 FDC_WRFIFO(fdc, type->gap1); /*gap1 size*/
1839 FDC_WRFIFO(fdc, type->datalen); /*data length*/
1845 callout_stop(&fdc->sc_timo_ch);
1846 fdc->sc_state = SEEKCOMPLETE;
1847 if (fdc->sc_flags & FDC_NEEDHEADSETTLE) {
1849 callout_reset(&fdc->sc_intr_ch, hz / 50,
1850 fdcpseudointr, fdc);
1859 if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 ||
1863 fdcstatus(fdc, "seek failed");
1865 fdcretry(fdc);
1877 fdc->sc_itask = FDC_ITASK_RESULT;
1878 fdc->sc_state = IOCLEANUPWAIT;
1879 fdc->sc_nstat = 0;
1881 callout_reset(&fdc->sc_timo_ch, hz / 10, fdctimeout, fdc);
1890 fdcstatus(fdc, "timeout");
1893 fdcretry(fdc);
1896 fdc->sc_state = DORESET;
1900 callout_stop(&fdc->sc_timo_ch);
1903 fdcretry(fdc);
1907 callout_stop(&fdc->sc_timo_ch);
1912 if (fdc->sc_nstat != 7 || st1 != 0 ||
1914 ((st0 & 0xf8) != 0x20 || (fdc->sc_cfg & CFG_EIS) == 0))) {
1917 fdcstatus(fdc, bp->b_flags & B_READ ?
1921 fdc->sc_nstat, fdc->sc_tc);
1924 if (fdc->sc_nstat == 7 &&
1931 int thr = fdc->sc_cfg & CFG_THRHLD_MASK;
1934 fdc->sc_cfg &= ~CFG_THRHLD_MASK;
1935 fdc
1938 printf("fdc: %d -> threshold\n",
1941 fdconf(fdc);
1942 fdc->sc_overruns = 0;
1944 if (++fdc->sc_overruns < 3) {
1945 fdc->sc_state = DOIO;
1949 fdcretry(fdc);
1952 if (fdc->sc_errors) {
1957 fdc->sc_errors = 0;
1959 if (--fdc->sc_overruns < -20) {
1960 int thr = fdc->sc_cfg & CFG_THRHLD_MASK;
1963 fdc->sc_cfg &= ~CFG_THRHLD_MASK;
1964 fdc->sc_cfg |= (thr & CFG_THRHLD_MASK);
1967 printf("fdc: %d -> threshold\n",
1970 fdconf(fdc);
1972 fdc->sc_overruns = 0;
1987 fd_set_motor(fdc);
1989 fdc->sc_nstat = 0;
1990 fdc->sc_itask = FDC_ITASK_SENSEI;
1991 fdc->sc_state = RESETCOMPLETE;
1992 callout_reset(&fdc->sc_timo_ch, hz / 2, fdctimeout, fdc);
1993 fdc_reset(fdc);
1997 callout_stop(&fdc->sc_timo_ch);
1998 fdconf(fdc);
2002 fdc->sc_state = RECALWAIT;
2003 fdc->sc_itask = FDC_ITASK_SENSEI;
2004 fdc->sc_nstat = 0;
2005 callout_reset(&fdc->sc_timo_ch, 5 * hz, fdctimeout, fdc);
2007 FDC_WRFIFO(fdc, NE7CMD_RECAL);
2008 FDC_WRFIFO(fdc, fd->sc_drive);
2012 callout_stop(&fdc->sc_timo_ch);
2013 fdc->sc_state = RECALCOMPLETE;
2014 if ((fdc->sc_flags & FDC_NEEDHEADSETTLE) != 0) {
2016 callout_reset(&fdc->sc_intr_ch, hz / 30,
2017 fdcpseudointr, fdc);
2023 if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 || cyl != 0) {
2026 fdcstatus(fdc, "recalibrate failed");
2028 fdcretry(fdc);
2040 fdcstatus(fdc, "stray interrupt");
2052 callout_stop(&fdc->sc_timo_ch);
2053 fdcretry(fdc);
2054 fdc->sc_state = DORESET;
2063 fdcretry(struct fdc_softc *fdc)
2069 fd = fdc->sc_drives.tqh_first;
2072 fdc->sc_overruns = 0;
2076 switch (fdc->sc_errors) {
2078 if (fdc->sc_nstat == 7 &&
2079 (fdc->sc_status[0] & 0xd8) == 0x40 &&
2080 (fdc->sc_status[1] & 0x2) == 0x2) {
2081 aprint_error_dev(fdc->sc_dev, "read-only medium\n");
2086 fdc->sc_state =
2087 (fdc->sc_flags & FDC_EIS) ? DOIO : DOSEEK;
2092 fdc->sc_state = DORECAL;
2096 if (fdc->sc_nstat == 7 &&
2097 fdc->sc_status[0] == 0 &&
2098 fdc->sc_status[1] == 0 &&
2099 fdc->sc_status[2] == 0) {
2106 aprint_error_dev(fdc->sc_dev, "no medium?\n");
2112 fdc->sc_state = DORESET;
2122 fdcstatus(fdc, "controller status");
2129 fdc->sc_errors++;
2136 struct fdc_softc *fdc;
2150 fdc = device_private(device_parent(fd->sc_dev));
2199 if (fdc->sc_flags & FDC_NOEJECT)
2328 fdc_wrfifo(fdc, NE7CMD_DUMPREG);
2329 fdcresult(fdc);
2330 printf("fdc: dumpreg(%d regs): <", fdc->sc_nstat);
2331 for (i = 0; i < fdc->sc_nstat; i++)
2332 printf(" 0x%x", fdc->sc_status[i]);
2337 fdc->sc_cfg &= ~CFG_THRHLD_MASK;
2338 fdc->sc_cfg |= (*(int *)addr & CFG_THRHLD_MASK);
2339 fdconf(fdc);
2343 fdc_wrfifo(fdc, NE7CMD_SENSEI);
2344 fdcresult(fdc);
2345 printf("fdc: sensei(%d regs): <", fdc->sc_nstat);
2346 for (i=0; i< fdc->sc_nstat; i++)
2347 printf(" 0x%x", fdc->sc_status[i]);
2490 struct fdc_softc *fdc = device_private(device_parent(fd->sc_dev));
2499 if (CPU_ISSUN4M && (fdc->sc_flags & FDC_82077) != 0) {
2501 bus_space_tag_t t = fdc->sc_bustag;
2502 bus_space_handle_t h = fdc->sc_handle;
2505 bus_space_write_1(t, h, fdc->sc_reg_dor, dor | FDO_EJ);
2507 bus_space_write_1(t, h, fdc->sc_reg_dor, FDO_FRST | FDO_DS);
Indexes created Sun Sep 28 12:09:53 GMT 2025