Cross Reference: /src/sys/arch/sun3/sun3x/pmap.c

Lines Matching refs:raw
757 		kernAbase[i].addr.raw = 0;
766 		kernAbase[i].attr.raw =
768 		kernAbase[i].addr.raw = mmu_vtop(&kernBbase[b]);
771 			kernBbase[b + j].attr.raw =
1001 		kpte[i].attr.raw = mon_ctbl[i];
1019 		kpte[i].attr.raw = mon_ctbl[i];
1052 		mon_dte[i].attr.raw = kernAbase[i].attr.raw;
1053 		mon_dte[i].addr.raw = kernAbase[i].addr.raw;
1155 			b_tbl->bt_dtbl[j].attr.raw = MMU_DT_INVALID;
1188 			c_tbl->ct_dtbl[j].attr.raw = MMU_DT_INVALID;
1300 		tbl->bt_parent->at_dtbl[tbl->bt_pidx].attr.raw = MMU_DT_INVALID;
1323 		tbl->ct_parent->bt_dtbl[tbl->ct_pidx].attr.raw = MMU_DT_INVALID;
1414 				dtbl = mmu_ptov(dte[i].addr.raw);
1420 				dte[i].attr.raw = MMU_DT_INVALID;
1463 				dte[i].attr.raw = MMU_DT_INVALID;
1501 				if (c_pte->attr.raw & MMU_SHORT_PTE_WIRED)
1589 		pv->pv_flags |= (u_short) pte->attr.raw;
1591 	pte->attr.raw = MMU_DT_INVALID;
1627 	*b_tbl = mmuB2tmgr(mmu_ptov(a_dte->addr.raw));
1791 		b_dte = mmu_ptov(a_dte->addr.raw);
1809 		a_dte->addr.raw = mmu_vtop(b_tbl->bt_dtbl);
1810 		a_dte->attr.raw = MMU_LONG_DTE_LU | MMU_DT_SHORT;
1861 		b_dte->attr.raw = mmu_vtop(c_tbl->ct_dtbl);
1862 		b_dte->attr.raw |= MMU_DT_SHORT;
1904 		if (c_pte->attr.raw & MMU_SHORT_PTE_WIRED) {
1943 			c_pte->attr.raw &= (MMU_SHORT_PTE_M
1965 		c_pte->attr.raw = 0;
1977 		c_pte->attr.raw |= MMU_SHORT_PTE_WIRED;
1989 	if (c_pte->attr.raw & ~(MMU_SHORT_PTE_M |
1995 	c_pte->attr.raw |= ((u_long) pa | MMU_DT_PAGE);
2002 		c_pte->attr.raw |= MMU_SHORT_PTE_WP;
2008 		c_pte->attr.raw |= MMU_SHORT_PTE_USED;
2010 			c_pte->attr.raw |= MMU_SHORT_PTE_M;
2020 		c_pte->attr.raw |= MMU_SHORT_PTE_CI;
2112 		    pte->attr.raw &= (MMU_SHORT_PTE_USED|MMU_SHORT_PTE_M);
2115 		pte->attr.raw = MMU_DT_INVALID;
2123 	pte->attr.raw |= (pa | MMU_DT_PAGE);
2126 		pte->attr.raw |= MMU_SHORT_PTE_WP;
2128 		pte->attr.raw |= MMU_SHORT_PTE_CI;
2157 	pte->attr.raw = MMU_DT_INVALID | MMU_DT_PAGE | (pa & MMU_PAGE_MASK);
2159 		pte->attr.raw |= MMU_SHORT_PTE_WP;
2161 		pte->attr.raw |= MMU_SHORT_PTE_CI;
2178 		kernCbase[idx++].attr.raw = MMU_DT_INVALID;
2227 		            pte->attr.raw |= MMU_SHORT_PTE_WP;
2322 		    b_tbl = (b_tmgr_t *) a_tbl->at_dtbl[a_idx].addr.raw;
2335 		      pte->attr.raw |= MMU_SHORT_PTE_WP;
2404 	if (!(pte->attr.raw & MMU_SHORT_PTE_WIRED))
2408 	pte->attr.raw &= ~(MMU_SHORT_PTE_WIRED);
2734 				pte->attr.raw |= MMU_SHORT_PTE_WP;
2740 				pv->pv_flags |= pte->attr.raw;
2742 				pte->attr.raw = MMU_DT_INVALID;
2888 		pte->attr.raw &= ~(flag);
3110 			b_dte = mmu_ptov(a_dte->addr.raw);
3140 				a_dte->attr.raw = MMU_DT_INVALID;
3170 				b_dte = mmu_ptov(a_dte->addr.raw);
3189 				a_dte->attr.raw = MMU_DT_INVALID;
3216 			b_dte = mmu_ptov(a_dte->addr.raw);
3234 				a_dte->attr.raw = MMU_DT_INVALID;
3309 				b_dte->attr.raw = MMU_DT_INVALID;
3334 				b_dte->attr.raw = MMU_DT_INVALID;
3358 				b_dte->attr.raw = MMU_DT_INVALID;
3404 			if (c_pte->attr.raw & MMU_SHORT_PTE_WIRED)
3660 	        b_tbl = mmuB2tmgr(mmu_ptov(a_tbl->at_dtbl[a_idx].addr.raw));
3712 	return (pte->attr.raw);
3730 	kernCbase[idx].attr.raw = pte;
3801 	rp.attr.raw = ~MMU_LONG_RP_LU;
3802 	rp.addr.raw = (unsigned int) a_tbl;