Cross Reference: /src/sys/arch/vax/vsa/ncr.c

Lines Matching defs:ncr_sc
85 	struct	ncr5380_softc	ncr_sc;
138 	struct ncr5380_softc * const ncr_sc = &sc->ncr_sc;
141 	ncr_sc->sc_dev = self;
164 	ncr_sc->sc_dma_alloc = si_dma_alloc;
165 	ncr_sc->sc_dma_free  = si_dma_free;
166 	ncr_sc->sc_dma_setup = si_dma_setup;
167 	ncr_sc->sc_dma_start = si_dma_start;
168 	ncr_sc->sc_dma_poll  = si_dma_poll;
169 	ncr_sc->sc_dma_eop   = si_dma_eop;
170 	ncr_sc->sc_dma_stop  = si_dma_stop;
177 	ncr_sc->sc_pio_out = ncr5380_pio_out;
178 	ncr_sc->sc_pio_in =  ncr5380_pio_in;
180 	ncr_sc->sc_min_dma_len = MIN_DMA_LEN;
185 /*	ncr_sc->sc_regt =  Unused on VAX */
186 	ncr_sc->sc_regh = vax_map_physmem(va->va_paddr, 1);
189 	ncr_sc->sci_r0 = 0;
190 	ncr_sc->sci_r1 = 4;
191 	ncr_sc->sci_r2 = 8;
192 	ncr_sc->sci_r3 = 12;
193 	ncr_sc->sci_r4 = 16;
194 	ncr_sc->sci_r5 = 20;
195 	ncr_sc->sci_r6 = 24;
196 	ncr_sc->sci_r7 = 28;
198 	ncr_sc->sc_rev = NCR_VARIANT_NCR5380;
200 	ncr_sc->sc_no_disconnect = 0xff;
218 		bus_space_write_1(ncr_sc->sc_regt, ncr_sc->sc_regh,
225 	ncr_sc->sc_adapter.adapt_minphys = si_minphys;
226 	ncr_sc->sc_channel.chan_id = target;
236 	ncr5380_attach(ncr_sc);
250 si_dma_alloc(struct ncr5380_softc *ncr_sc)
252 	struct si_softc *sc = (struct si_softc *)ncr_sc;
253 	struct sci_req *sr = ncr_sc->sc_current;
267 	xlen = ncr_sc->sc_datalen;
286 	dh->dh_addr = ncr_sc->sc_dataptr;
288 	if (((vaddr_t)ncr_sc->sc_dataptr & KERNBASE) == 0) {
302 si_dma_free(struct ncr5380_softc *ncr_sc)
304 	struct sci_req *sr = ncr_sc->sc_current;
316 si_dma_setup(struct ncr5380_softc *ncr_sc)
322 si_dma_start(struct ncr5380_softc *ncr_sc)
324 	struct si_softc *sc = (struct si_softc *)ncr_sc;
328 		si_dma_go(ncr_sc);
339 	struct ncr5380_softc *ncr_sc = arg;
340 	struct si_softc *sc = (struct si_softc *)ncr_sc;
341 	struct sci_req *sr = ncr_sc->sc_current;
351 		bus_space_write_1(ncr_sc->sc_regt, ncr_sc->sc_regh,
354 		bus_space_write_1(ncr_sc->sc_regt, ncr_sc->sc_regh,
357 	bus_space_write_4(ncr_sc->sc_regt, ncr_sc->sc_regh,
359 	bus_space_write_4(ncr_sc->sc_regt, ncr_sc->sc_regh,
365 		NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT);
366 		NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA);
367 		NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
369 		NCR5380_WRITE(ncr_sc, sci_dma_send, 0);
371 		NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN);
372 		NCR5380_WRITE(ncr_sc, sci_icmd, 0);
373 		NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
375 		NCR5380_WRITE(ncr_sc, sci_irecv, 0);
377 	ncr_sc->sc_state |= NCR_DOINGDMA;
384 si_dma_poll(struct ncr5380_softc *ncr_sc)
393 si_dma_eop(struct ncr5380_softc *ncr_sc)
399 si_dma_stop(struct ncr5380_softc *ncr_sc)
401 	struct si_softc *sc = (struct si_softc *)ncr_sc;
402 	struct sci_req *sr = ncr_sc->sc_current;
406 	if (ncr_sc->sc_state & NCR_DOINGDMA) 
407 		ncr_sc->sc_state &= ~NCR_DOINGDMA;
415 		count = bus_space_read_4(ncr_sc->sc_regt,
416 		    ncr_sc->sc_regh, sc->ncr_dmacount);
427 		ncr_sc->sc_dataptr += dh->dh_len;
428 		ncr_sc->sc_datalen -= dh->dh_len;
431 	NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) &
433 	NCR5380_WRITE(ncr_sc, sci_icmd, 0);
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