Lines Matching refs:DBC_CTL
240 { DBC_CTL, { DBCOOL_LOCAL_TMIN,
243 { DBC_CTL, { DBCOOL_LOCAL_TTHRESH,
246 { DBC_CTL, { DBCOOL_R1_LCL_TMIN_HYST | 0x80,
249 { DBC_CTL, { DBCOOL_REMOTE1_TMIN,
252 { DBC_CTL, { DBCOOL_REMOTE1_TTHRESH,
255 { DBC_CTL, { DBCOOL_R1_LCL_TMIN_HYST,
258 { DBC_CTL, { DBCOOL_REMOTE2_TMIN,
261 { DBC_CTL, { DBCOOL_REMOTE2_TTHRESH,
264 { DBC_CTL, { DBCOOL_R2_TMIN_HYST,
310 { DBC_CTL, { DBCOOL_LOCAL_TMIN,
313 { DBC_CTL, { DBCOOL_LOCAL_TTHRESH,
316 { DBC_CTL, { DBCOOL_R1_LCL_TMIN_HYST | 0x80,
319 { DBC_CTL, { DBCOOL_REMOTE1_TMIN,
322 { DBC_CTL, { DBCOOL_REMOTE1_TTHRESH,
325 { DBC_CTL, { DBCOOL_R1_LCL_TMIN_HYST,
328 { DBC_CTL, { DBCOOL_REMOTE2_TMIN,
331 { DBC_CTL, { DBCOOL_REMOTE2_TTHRESH,
334 { DBC_CTL, { DBCOOL_R2_TMIN_HYST,
368 { DBC_CTL, { DBCOOL_LOCAL_TMIN,
371 { DBC_CTL, { DBCOOL_LOCAL_TTHRESH,
374 { DBC_CTL, { DBCOOL_R1_LCL_TMIN_HYST | 0x80,
377 { DBC_CTL, { DBCOOL_REMOTE1_TMIN,
380 { DBC_CTL, { DBCOOL_REMOTE1_TTHRESH,
383 { DBC_CTL, { DBCOOL_R1_LCL_TMIN_HYST,
386 { DBC_CTL, { DBCOOL_REMOTE2_TMIN,
389 { DBC_CTL, { DBCOOL_REMOTE2_TTHRESH,
392 { DBC_CTL, { DBCOOL_R2_TMIN_HYST,
480 { DBC_CTL, { DBCOOL_LOCAL_TMIN,
483 { DBC_CTL, { DBCOOL_LOCAL_TTHRESH,
486 { DBC_CTL, { DBCOOL_R1_LCL_TMIN_HYST | 0x80,
489 { DBC_CTL, { DBCOOL_REMOTE1_TMIN,
492 { DBC_CTL, { DBCOOL_REMOTE1_TTHRESH,
495 { DBC_CTL, { DBCOOL_R1_LCL_TMIN_HYST,
498 { DBC_CTL, { DBCOOL_REMOTE2_TMIN,
501 { DBC_CTL, { DBCOOL_REMOTE2_TTHRESH,
504 { DBC_CTL, { DBCOOL_R2_TMIN_HYST,
520 { DBC_CTL, { DBCOOL_ADM1030_L_TMIN,
523 { DBC_CTL, { DBCOOL_ADM1030_L_TTHRESH,
526 { DBC_CTL, { DBCOOL_ADM1030_L_TTHRESH,
529 { DBC_CTL, { DBCOOL_ADM1030_R_TMIN,
532 { DBC_CTL, { DBCOOL_ADM1030_R_TTHRESH,
535 { DBC_CTL, { DBCOOL_ADM1030_R_TTHRESH,
564 { DBC_CTL, { DBCOOL_ADM1030_L_TMIN,
567 { DBC_CTL, { DBCOOL_ADM1030_L_TTHRESH,
570 { DBC_CTL, { DBCOOL_ADM1030_L_TTHRESH,
573 { DBC_CTL, { DBCOOL_ADM1030_R_TMIN,
576 { DBC_CTL, { DBCOOL_ADM1030_R_TTHRESH,
579 { DBC_CTL, { DBCOOL_ADM1030_R_TTHRESH,
582 { DBC_CTL, { DBCOOL_ADM1031_R2_TMIN,
585 { DBC_CTL, { DBCOOL_ADM1031_R2_TTHRESH,
588 { DBC_CTL, { DBCOOL_ADM1031_R2_TTHRESH,
644 { DBC_CTL, { DBCOOL_LOCAL_TMIN,
647 { DBC_CTL, { DBCOOL_LOCAL_TTHRESH,
650 { DBC_CTL, { DBCOOL_REMOTE1_TMIN,
653 { DBC_CTL, { DBCOOL_REMOTE1_TTHRESH,
656 { DBC_CTL, { DBCOOL_REMOTE2_TMIN,
659 { DBC_CTL, { DBCOOL_REMOTE2_TTHRESH,
1614 else if (chip->table[i].type != DBC_CTL) {
1666 case DBC_CTL: