Cross Reference: /src/sys/dev/i2c/ds1307.c

Lines Matching defs:dm
238 	const struct dsrtc_model *dm;
245 		dm = dce->data;
246 		if (dm->dm_model == model)
247 			return dm;
255 	const struct dsrtc_model *dm = NULL;
259 		dm = dce->data;
261 	return dm;
265 dsrtc_is_valid_addr_for_model(const struct dsrtc_model *dm, i2c_addr_t addr)
268 	for (int i = 0; dm->dm_valid_addrs[i] != 0; i++) {
269 		if (addr == dm->dm_valid_addrs[i])
279 	const struct dsrtc_model *dm;
285 	dm = dsrtc_model_by_number(cf->cf_flags & 0xffff);
286 	if (dm == NULL)
289 	if (dsrtc_is_valid_addr_for_model(dm, ia->ia_addr))
300 	const struct dsrtc_model *dm;
304 	if ((dm = dsrtc_model_by_compat(ia)) == NULL)
305 		dm = dsrtc_model_by_number(device_cfdata(self)->cf_flags);
307 	if (dm == NULL) {
313 	    dm->dm_nvram_size > 0 ? "/NVRAM" : "");
314 	aprint_normal(": DS%u Real-time Clock%s\n", dm->dm_model,
315 	    dm->dm_nvram_size > 0 ? "/NVRAM" : "");
319 	sc->sc_model = *dm;
324 	if (dm->dm_flags & DSRTC_FLAG_BCD) {
412 	const struct dsrtc_model * const dm = &sc->sc_model;
413 	if (uio->uio_offset < 0 || uio->uio_offset >= dm->dm_nvram_size)
419 	while (uio->uio_resid && uio->uio_offset < dm->dm_nvram_size) {
422 		cmd = a + dm->dm_nvram_start;
453 	const struct dsrtc_model * const dm = &sc->sc_model;
454 	if (uio->uio_offset >= dm->dm_nvram_size)
460 	while (uio->uio_resid && uio->uio_offset < dm->dm_nvram_size) {
463 		cmdbuf[0] = a + dm->dm_nvram_start;
519 	struct dsrtc_model * const dm = &sc->sc_model;
523 	KASSERT(DSXXXX_RTC_SIZE >= dm->dm_rtc_size);
533 	for (u_int i = 0; !error && i < dm->dm_rtc_size; i++) {
534 		cmdbuf[0] = dm->dm_rtc_start + i;
583 	struct dsrtc_model * const dm = &sc->sc_model;
587 	KASSERT(DSXXXX_RTC_SIZE >= dm->dm_rtc_size);
618 	cmdbuf[0] = dm->dm_ch_reg;
630 		cmdbuf[1] &= ~dm->dm_ch_value;
632 		cmdbuf[1] |= dm->dm_ch_value;
648 	for (signed int i = dm->dm_rtc_size - 1; i >= 0; i--) {
649 		cmdbuf[0] = dm->dm_rtc_start + i;
650 		if ((dm->dm_flags & DSRTC_FLAG_VBATEN) &&
651 				dm->dm_rtc_start + i == dm->dm_vbaten_reg)
652 			bcd[i] |= dm->dm_vbaten_value;
653 		if (dm->dm_rtc_start + i == dm->dm_ch_reg) {
655 			if (dm->dm_flags & DSRTC_FLAG_CLOCK_HOLD_REVERSED)
656 				bcd[i] |= dm->dm_ch_value;
673 		cmdbuf[0] = dm->dm_ch_reg;
674 		if (dm->dm_flags & DSRTC_FLAG_CLOCK_HOLD_REVERSED)
675 			cmdbuf[1] |= dm->dm_ch_value;
677 			cmdbuf[1] &= ~dm->dm_ch_value;
736 	const struct dsrtc_model * const dm = &sc->sc_model;
748 	uint8_t reg = dm->dm_rtc_start;
774 	const struct dsrtc_model * const dm = &sc->sc_model;
775 	size_t buflen = dm->dm_rtc_size + 2;
780 	KASSERT((dm->dm_flags & DSRTC_FLAG_CLOCK_HOLD) == 0);
781 	KASSERT(dm->dm_ch_reg == dm->dm_rtc_start + 4);
783 	buf[0] = dm->dm_rtc_start;
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