Cross Reference: /src/sys/dev/i2c/ds1307.c

Lines Matching refs:dm
237 	const struct dsrtc_model *dm;
244 		dm = dce->data;
245 		if (dm->dm_model == model)
246 			return dm;
254 	const struct dsrtc_model *dm = NULL;
258 		dm = dce->data;
260 	return dm;
264 dsrtc_is_valid_addr_for_model(const struct dsrtc_model *dm, i2c_addr_t addr)
267 	for (int i = 0; dm->dm_valid_addrs[i] != 0; i++) {
268 		if (addr == dm->dm_valid_addrs[i])
278 	const struct dsrtc_model *dm;
284 	dm = dsrtc_model_by_number(cf->cf_flags & 0xffff);
285 	if (dm == NULL)
288 	if (dsrtc_is_valid_addr_for_model(dm, ia->ia_addr))
299 	const struct dsrtc_model *dm;
301 	if ((dm = dsrtc_model_by_compat(ia)) == NULL)
302 		dm = dsrtc_model_by_number(device_cfdata(self)->cf_flags);
304 	if (dm == NULL) {
310 	    dm->dm_nvram_size > 0 ? "/NVRAM" : "");
311 	aprint_normal(": DS%u Real-time Clock%s\n", dm->dm_model,
312 	    dm->dm_nvram_size > 0 ? "/NVRAM" : "");
316 	sc->sc_model = *dm;
321 	if (dm->dm_flags & DSRTC_FLAG_BCD) {
404 	const struct dsrtc_model * const dm = &sc->sc_model;
405 	if (uio->uio_offset < 0 || uio->uio_offset >= dm->dm_nvram_size)
411 	while (uio->uio_resid && uio->uio_offset < dm->dm_nvram_size) {
414 		cmd = a + dm->dm_nvram_start;
445 	const struct dsrtc_model * const dm = &sc->sc_model;
446 	if (uio->uio_offset >= dm->dm_nvram_size)
452 	while (uio->uio_resid && uio->uio_offset < dm->dm_nvram_size) {
455 		cmdbuf[0] = a + dm->dm_nvram_start;
511 	struct dsrtc_model * const dm = &sc->sc_model;
515 	KASSERT(DSXXXX_RTC_SIZE >= dm->dm_rtc_size);
525 	for (u_int i = 0; !error && i < dm->dm_rtc_size; i++) {
526 		cmdbuf[0] = dm->dm_rtc_start + i;
571 	struct dsrtc_model * const dm = &sc->sc_model;
575 	KASSERT(DSXXXX_RTC_SIZE >= dm->dm_rtc_size);
600 	cmdbuf[0] = dm->dm_ch_reg;
612 		cmdbuf[1] &= ~dm->dm_ch_value;
614 		cmdbuf[1] |= dm->dm_ch_value;
630 	for (signed int i = dm->dm_rtc_size - 1; i >= 0; i--) {
631 		cmdbuf[0] = dm->dm_rtc_start + i;
632 		if ((dm->dm_flags & DSRTC_FLAG_VBATEN) &&
633 				dm->dm_rtc_start + i == dm->dm_vbaten_reg)
634 			bcd[i] |= dm->dm_vbaten_value;
635 		if (dm->dm_rtc_start + i == dm->dm_ch_reg) {
637 			if (dm->dm_flags & DSRTC_FLAG_CLOCK_HOLD_REVERSED)
638 				bcd[i] |= dm->dm_ch_value;
655 		cmdbuf[0] = dm->dm_ch_reg;
656 		if (dm->dm_flags & DSRTC_FLAG_CLOCK_HOLD_REVERSED)
657 			cmdbuf[1] |= dm->dm_ch_value;
659 			cmdbuf[1] &= ~dm->dm_ch_value;
718 	const struct dsrtc_model * const dm = &sc->sc_model;
730 	uint8_t reg = dm->dm_rtc_start;
756 	const struct dsrtc_model * const dm = &sc->sc_model;
757 	size_t buflen = dm->dm_rtc_size + 2;
762 	KASSERT((dm->dm_flags & DSRTC_FLAG_CLOCK_HOLD) == 0);
763 	KASSERT(dm->dm_ch_reg == dm->dm_rtc_start + 4);
765 	buf[0] = dm->dm_rtc_start;
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