Lines Matching defs:enable_mask
81 uint8_t enable_mask;
102 .enable_reg = 0x23, .enable_mask = __BIT(0),
106 .enable_reg = 0x23, .enable_mask = __BIT(1),
110 .enable_reg = 0x23, .enable_mask = __BIT(2) },
112 .enable_reg = 0x23, .enable_mask = __BIT(3),
118 .enable_reg = 0x27, .enable_mask = __BIT(0),
122 .enable_reg = 0x27, .enable_mask = __BIT(1),
126 .enable_reg = 0x27, .enable_mask = __BIT(2),
140 .enable_reg = 0x23, .enable_mask = __BIT(0),
144 .enable_reg = 0x23, .enable_mask = __BIT(1),
148 .enable_reg = 0x23, .enable_mask = __BIT(2) },
150 .enable_reg = 0x23, .enable_mask = __BIT(3),
156 .enable_reg = 0x24, .enable_mask = __BIT(0),
160 .enable_reg = 0x24, .enable_mask = __BIT(1),
164 .enable_reg = 0x24, .enable_mask = __BIT(2),
168 .enable_reg = 0x24, .enable_mask = __BIT(3),
172 .enable_reg = 0x24, .enable_mask = __BIT(4),
176 .enable_reg = 0x24, .enable_mask = __BIT(5),
180 .enable_reg = 0x24, .enable_mask = __BIT(6),
184 .enable_reg = 0x24, .enable_mask = __BIT(7),
190 .enable_reg = 0x23, .enable_mask = __BIT(5) },
192 .enable_reg = 0x23, .enable_mask = __BIT(6) },
551 if (!c->enable_mask)
556 val |= c->enable_mask << 4;
560 val |= c->enable_mask;
562 val &= ~c->enable_mask;