Cross Reference: /src/sys/dev/ic/ahcisatareg.h

Lines Matching refs:AHCI_P_OFFSET
192 #define AHCI_P_OFFSET(port) (0x80 * (port))
194 #define AHCI_P_CLB(p)	(0x100 + AHCI_P_OFFSET(p)) /* command list addr */
195 #define AHCI_P_CLBU(p)	(0x104 + AHCI_P_OFFSET(p)) /* command list addr */
196 #define AHCI_P_FB(p)	(0x108 + AHCI_P_OFFSET(p)) /* FIS addr */
197 #define AHCI_P_FBU(p)	(0x10c + AHCI_P_OFFSET(p)) /* FIS addr */
198 #define AHCI_P_IS(p)	(0x110 + AHCI_P_OFFSET(p)) /* Interrupt status */
199 #define AHCI_P_IE(p)	(0x114 + AHCI_P_OFFSET(p)) /* Interrupt enable */
218 #define AHCI_P_CMD(p)	(0x118 + AHCI_P_OFFSET(p)) /* Port command/status */
245 #define AHCI_P_TFD(p)	(0x120 + AHCI_P_OFFSET(p)) /* Port task file data */
255 #define AHCI_P_SIG(p)	(0x124 + AHCI_P_OFFSET(p)) /* device signature */
265 #define AHCI_P_SSTS(p)	(0x128 + AHCI_P_OFFSET(p)) /* Serial ATA status */
267 #define AHCI_P_SCTL(p)	(0x12c + AHCI_P_OFFSET(p)) /* Serial ATA control */
269 #define AHCI_P_SERR(p)	(0x130 + AHCI_P_OFFSET(p)) /* Serial ATA error */
271 #define AHCI_P_SACT(p)	(0x134 + AHCI_P_OFFSET(p)) /* Serial ATA active */
274 #define AHCI_P_CI(p)	(0x138 + AHCI_P_OFFSET(p)) /* Command issued */
277 #define AHCI_P_FNTF(p)	(0x13c + AHCI_P_OFFSET(p)) /* SNotification */
280 #define AHCI_P_FBS(p)	(0x140 + AHCI_P_OFFSET(p)) /* Port task file data */
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