Cross Reference: /src/sys/dev/ic/arn9380.c

Lines Matching defs:eep
133 	struct ar9380_eeprom *eep = sc->sc_eep;
134 	struct ar9380_base_eep_hdr *base = &eep->baseEepHeader;
144 	IEEE80211_ADDR_COPY(ic->ic_myaddr, eep->macAddr);
179 	type = MS(eep->baseEepHeader.txrxgain, AR_EEP_RX_GAIN);
190 	type = MS(eep->baseEepHeader.txrxgain, AR_EEP_TX_GAIN);
221 	struct ar9380_eeprom *eep = sc->sc_eep;
222 	struct ar9380_base_eep_hdr *base = &eep->baseEepHeader;
230 	modal = &eep->modalHeader2G;
238 	modal = &eep->modalHeader5G;
252 	const struct ar9380_eeprom *eep = sc->sc_eep;
256 		modal = &eep->modalHeader2G;
258 		modal = &eep->modalHeader5G;
303 	const struct ar9380_eeprom *eep = sc->sc_eep;
310 		modal = &eep->modalHeader2G;
312 		modal = &eep->modalHeader5G;
349 		ant_div_ctrl = eep->base_ext1.ant_div_control;
366 	if (eep->baseEepHeader.miscConfiguration & AR_EEP_DRIVE_STRENGTH) {
400 		    eep->base_ext2.xatten1DBLow[i] != 0) {
403 				    5180, eep->base_ext2.xatten1DBLow[i],
409 				    5785, eep->base_ext2.xatten1DBHigh[i]);
415 		    eep->base_ext2.xatten1MarginLow[i] != 0) {
418 				    5180, eep->base_ext2.xatten1MarginLow[i],
424 				    5785, eep->base_ext2.xatten1MarginHigh[i]);
443 	    (eep->baseEepHeader.featureEnable & AR_EEP_TUNING_CAPS)) {
446 		    eep->baseEepHeader.params_for_tuning_caps[0]);
448 		    eep->baseEepHeader.params_for_tuning_caps[0]);
458 	const struct ar9380_eeprom *eep = sc->sc_eep;
460 	if (eep->baseEepHeader.featureEnable & AR_EEP_INTERNAL_REGULATOR) {
464 		AR_WRITE(sc, AR_RTC_REG_CONTROL0, eep->baseEepHeader.swreg);
494 	const struct ar9380_eeprom *eep = sc->sc_eep;
500 	if (eep->baseEepHeader.featureEnable & AR_EEP_INTERNAL_REGULATOR) {
564 	const struct ar9380_eeprom *eep = sc->sc_eep;
571 		spurchans = eep->modalHeader2G.spurChans;
573 		spurchans = eep->modalHeader5G.spurChans;
720 	const struct ar9380_eeprom *eep = sc->sc_eep;
728 		    eep->calTargetFbinCck, eep->calTargetPowerCck,
733 		    eep->calTargetFbin2G, eep->calTargetPower2G,
738 		    eep->calTargetFbin2GHT20, eep->calTargetPower2GHT20,
744 			    eep->calTargetFbin2GHT40,
745 			    eep->calTargetPower2GHT40,
752 		    eep->calTargetFbin5G, eep->calTargetPower5G,
757 		    eep->calTargetFbin5GHT20, eep->calTargetPower5GHT20,
763 			    eep->calTargetFbin5GHT40,
764 			    eep->calTargetPower5GHT40,
834 	const struct ar9380_eeprom *eep = sc->sc_eep;
841 		pierfreq = eep->calFreqPier2G;
842 		pierdata = eep->calPierData2G[chain];
846 		pierfreq = eep->calFreqPier5G;
847 		pierdata = eep->calPierData5G[chain];
865 	const struct ar9380_eeprom *eep = sc->sc_eep;
872 		modal = &eep->modalHeader2G;
874 		modal = &eep->modalHeader5G;
894 	    eep->base_ext2.tempSlopeLow != 0) {
897 			    5180, eep->base_ext2.tempSlopeLow,
903 			    5785, eep->base_ext2.tempSlopeHigh);
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