Lines Matching defs:ah
283 struct ath_hal *ah = NULL;
293 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
294 if (ah == NULL) {
300 if (ah->ah_abi != HAL_ABI_VERSION) {
303 ah->ah_abi, HAL_ABI_VERSION);
307 sc->sc_ah = ah;
320 sc->sc_mrretry = ath_hal_setupxtxdesc(ah, NULL, 0,0, 0,0, 0,0);
327 if (ath_hal_hwphycounters(ah))
333 sc->sc_keymax = ath_hal_keycachesize(ah);
344 ath_hal_keyreset(ah, i);
411 sc->sc_bhalq = ath_beaconq_setup(ah);
491 ath_hal_gpioCfgOutput(ah, sc->sc_ledpin,
493 ath_hal_gpioset(ah, sc->sc_ledpin, !sc->sc_ledon);
525 if (ath_hal_ciphersupported(ah, HAL_CIPHER_WEP))
527 if (ath_hal_ciphersupported(ah, HAL_CIPHER_AES_OCB))
529 if (ath_hal_ciphersupported(ah, HAL_CIPHER_AES_CCM))
531 if (ath_hal_ciphersupported(ah, HAL_CIPHER_CKIP))
533 if (ath_hal_ciphersupported(ah, HAL_CIPHER_TKIP)) {
540 if (ath_hal_ciphersupported(ah, HAL_CIPHER_MIC))
547 if (ath_hal_hastkipsplit(ah) ||
548 !ath_hal_settkipsplit(ah, AH_FALSE))
556 if (ath_hal_haswmetkipmic(ah))
559 sc->sc_hasclrkey = ath_hal_ciphersupported(ah, HAL_CIPHER_CLR);
560 sc->sc_mcastkey = ath_hal_getmcastkeysearch(ah);
580 if (ath_hal_hastpc(ah) || ath_hal_hastxpowlimit(ah))
592 if (ath_hal_hasbursting(ah))
604 sc->sc_defant = ath_hal_getdefantenna(ah);
610 sc->sc_hasveol = ath_hal_hasveol(ah);
613 ath_hal_getmac(ah, ic->ic_myaddr);
653 if (ah)
654 ath_hal_detach(ah);
722 struct ath_hal *ah = sc->sc_ah;
728 ath_hal_setpower(ah, HAL_PM_AWAKE);
730 ath_hal_reset(ah, ic->ic_opmode, &sc->sc_curchan, HAL_M_IBSS, &status);
738 ath_hal_keyreset(ah, i);
740 ath_hal_resettxqueue(ah, sc->sc_bhalq);
743 ath_hal_resettxqueue(ah, i);
761 struct ath_hal *ah = sc->sc_ah;
773 if (!ath_hal_intrpend(ah)) /* shared irq, not for us */
779 ath_hal_getisr(ah, &status); /* clear ISR */
780 ath_hal_intrset(ah, 0); /* disable further intr's */
789 ath_hal_getisr(ah, &status); /* NB: clears ISR too */
800 ath_hal_intrset(ah, 0); /* disable intr's until reset */
804 ath_hal_intrset(ah, 0); /* disable intr's until reset */
828 ath_hal_updatetxtriglevel(ah, AH_TRUE);
844 ath_hal_intrset(ah, 0);
849 ath_hal_mibevent(ah, &sc->sc_halstats);
850 ath_hal_intrset(ah, sc->sc_imask);
952 struct ath_hal *ah = sc->sc_ah;
955 if (ath_hal_procdfs(ah, &hchan)) {
999 struct ath_hal *ah = sc->sc_ah;
1004 (void)ath_hal_settkipmic(ah, AH_FALSE);
1007 (void)ath_hal_settkipmic(ah, AH_TRUE);
1018 struct ath_hal *ah = sc->sc_ah;
1049 if (!ath_hal_reset(ah, ic->ic_opmode, &sc->sc_curchan, AH_FALSE, &status)) {
1093 ath_hal_intrset(ah, sc->sc_imask);
1124 struct ath_hal *ah = sc->sc_ah;
1156 ath_hal_gpioset(ah, sc->sc_ledpin,
1160 ath_hal_intrset(ah, 0);
1165 ath_hal_phydisable(ah);
1189 struct ath_hal *ah = sc->sc_ah;
1192 sc->sc_diversity != ath_hal_getdiversity(ah)) {
1195 sc->sc_diversity = ath_hal_getdiversity(ah);
1211 struct ath_hal *ah = sc->sc_ah;
1223 ath_hal_intrset(ah, 0); /* disable interrupts */
1228 if (!ath_hal_reset(ah, ic->ic_opmode, &sc->sc_curchan, AH_TRUE, &status))
1245 ath_hal_intrset(ah, sc->sc_imask);
1307 struct ath_hal *ah = sc->sc_ah;
1450 tsf = ath_hal_gettsf64(ah);
1542 struct ath_hal *ah = sc->sc_ah;
1554 if (!ath_hal_keyset(ah, ATH_KEY(k->wk_keyix), hk,
1561 return ath_hal_keyset(ah, ATH_KEY(k->wk_keyix+32),
1572 return ath_hal_keyset(ah, ATH_KEY(k->wk_keyix), hk, mac);
1584 return ath_hal_keyset(ah, ATH_KEY(k->wk_keyix), hk, mac);
1588 return ath_hal_keyset(ah, k->wk_keyix, hk, mac);
1614 struct ath_hal *ah = sc->sc_ah;
1652 return ath_hal_keyset(ah, ATH_KEY(k->wk_keyix), &hk, mac);
1862 struct ath_hal *ah = sc->sc_ah;
1873 ath_hal_keyreset(ah, keyix);
1879 ath_hal_keyreset(ah, keyix+32); /* RX key */
1969 struct ath_hal *ah = sc->sc_ah;
1973 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
1995 struct ath_hal *ah = sc->sc_ah;
2004 ath_hal_setrxfilter(ah, rfilt);
2007 ath_hal_setopmode(ah);
2027 ath_hal_setmac(ah, ic->ic_myaddr);
2054 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
2066 struct ath_hal *ah = sc->sc_ah;
2069 ath_hal_setslottime(ah, HAL_SLOT_TIME_9);
2071 ath_hal_setslottime(ah, HAL_SLOT_TIME_20);
2100 ath_beaconq_setup(struct ath_hal *ah)
2110 return ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_BEACON, &qi);
2121 struct ath_hal *ah = sc->sc_ah;
2124 ath_hal_gettxqueueprops(ah, sc->sc_bhalq, &qi);
2143 if (!ath_hal_settxqueueprops(ah, sc->sc_bhalq, &qi)) {
2148 ath_hal_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
2206 struct ath_hal *ah = sc->sc_ah;
2255 ath_hal_setuptxdesc(ah, ds
2268 ath_hal_filltxdesc(ah, ds
2295 struct ath_hal *ah = sc->sc_ah;
2316 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
2339 ncabq = ath_hal_numtxpending(ah, sc->sc_cabq->axq_qnum);
2387 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
2400 ath_hal_txstart(ah, sc->sc_cabq->axq_qnum);
2401 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
2402 ath_hal_txstart(ah, sc->sc_bhalq);
2475 struct ath_hal *ah = sc->sc_ah;
2513 tsf = ath_hal_gettsf64(ah);
2585 ath_hal_intrset(ah, 0);
2586 ath_hal_beacontimers(ah, &bs);
2588 ath_hal_intrset(ah, sc->sc_imask);
2590 ath_hal_intrset(ah, 0);
2609 tsf = ath_hal_gettsf64(ah);
2625 ath_hal_beaconinit(ah, nexttbtt, intval);
2627 ath_hal_intrset(ah, sc->sc_imask);
2864 struct ath_hal *ah = sc->sc_ah;
2923 ath_hal_setuprxdesc(ah, ds
3009 struct ath_hal *ah = sc->sc_ah;
3012 ath_hal_setdefantenna(ah, antenna);
3044 struct ath_hal *ah = sc->sc_ah;
3069 nf = ath_hal_getchannoise(ah, &sc->sc_curchan);
3070 tsf = ath_hal_gettsf64(ah);
3099 status = ath_hal_rxprocdesc(ah, ds,
3312 ath_hal_rxmonitor(ah, &sc->sc_halstats, &sc->sc_curchan);
3314 if (ath_hal_radar_event(ah))
3337 struct ath_hal *ah = sc->sc_ah;
3359 qnum = ath_hal_setuptxqueue(ah, qtype, &qi);
3371 ath_hal_releasetxqueue(ah, qnum);
3429 struct ath_hal *ah = sc->sc_ah;
3432 ath_hal_gettxqueueprops(ah, txq->axq_qnum, &qi);
3438 if (!ath_hal_settxqueueprops(ah, txq->axq_qnum, &qi)) {
3444 ath_hal_resettxqueue(ah, txq->axq_qnum); /* push to h/w */
3614 struct ath_hal *ah = sc->sc_ah;
3917 dur += ath_hal_computetxtime(ah, rt,
3960 ctsduration += ath_hal_computetxtime(ah,
3967 ctsduration += ath_hal_computetxtime(ah,
3985 u_int64_t tsf = ath_hal_gettsf64(ah);
4027 ath_hal_setuptxdesc(ah, ds
4060 ath_hal_filltxdesc(ah, ds
4084 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
4102 ath_hal_txstart(ah, txq->axq_qnum);
4114 struct ath_hal *ah = sc->sc_ah;
4139 status = ath_hal_txprocdesc(ah, ds, &ds->ds_txstat);
4216 txqactive(struct ath_hal *ah, int qnum)
4219 ath_hal_gettxintrtxqs(ah, &txqs);
4337 struct ath_hal *ah = sc->sc_ah;
4359 ath_hal_txprocdesc(ah, bf->bf_desc,
4382 struct ath_hal *ah = sc->sc_ah;
4384 (void) ath_hal_stoptxdma(ah, txq->axq_qnum);
4387 (void *)(uintptr_t) ath_hal_gettxbuf(ah, txq->axq_qnum),
4397 struct ath_hal *ah = sc->sc_ah;
4403 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
4406 (void *)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq));
4425 struct ath_hal *ah = sc->sc_ah;
4427 ath_hal_stoppcurecv(ah); /* disable PCU */
4428 ath_hal_setrxfilter(ah, 0); /* clear recv filter */
4429 ath_hal_stopdmarecv(ah); /* disable DMA engine */
4435 (void *)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink);
4438 HAL_STATUS status = ath_hal_rxprocdesc(ah, ds,
4455 struct ath_hal *ah = sc->sc_ah;
4470 ath_hal_putrxbuf(ah, bf->bf_daddr);
4471 ath_hal_rxena(ah); /* enable recv descriptors */
4473 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
4524 struct ath_hal *ah = sc->sc_ah;
4527 ath_hal_radar_wait(ah, &hchan);
4558 struct ath_hal *ah = sc->sc_ah;
4573 ath_hal_mhz2ieee(ah, sc->sc_curchan.channel,
4576 ath_hal_mhz2ieee(ah, hchan.channel, hchan.channelFlags),
4588 ath_hal_intrset(ah, 0); /* disable interrupts */
4591 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) {
4644 ath_hal_intrset(ah, sc->sc_imask);
4672 struct ath_hal *ah = sc->sc_ah;
4680 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
4690 if (!ath_hal_calibrate(ah, &sc->sc_curchan, &iqCalDone)) {
4699 ath_hal_process_noisefloor(ah);
4733 struct ath_hal *ah = sc->sc_ah;
4755 ath_hal_setledstate(ah, leds[nstate]); /* set LED */
4762 ath_hal_intrset(ah, sc->sc_imask &~ HAL_INT_GLOBAL);
4778 ath_hal_setrxfilter(ah, rfilt);
4783 ath_hal_setassocid(ah, bssid, ni->ni_associd);
4785 ath_hal_setassocid(ah, bssid, 0);
4788 if (ath_hal_keyisvalid(ah, i))
4789 ath_hal_keysetmac(ah, i, bssid);
4823 ath_hal_stoptxdma(ah, sc->sc_bhalq);
4862 ath_hal_process_noisefloor(ah);
4870 ath_hal_intrset(ah,
4954 struct ath_hal *ah = sc->sc_ah;
4960 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,
4965 (void)ath_hal_getregdomain(ah, &rd);
4980 ix = ath_hal_mhz2ieee(ah, c->channel, c->channelFlags);
5078 struct ath_hal *ah = sc->sc_ah;
5082 ath_hal_settxpowlimit(ah, ic->ic_txpowlimit);
5084 (void)ath_hal_gettxpowlimit(ah, &txpow);
5115 struct ath_hal *ah = sc->sc_ah;
5121 rt = ath_hal_getratetable(ah, HAL_MODE_11A);
5124 rt = ath_hal_getratetable(ah, HAL_MODE_11B);
5127 rt = ath_hal_getratetable(ah, HAL_MODE_11G);
5131 rt = ath_hal_getratetable(ah, HAL_MODE_TURBO);
5134 rt = ath_hal_getratetable(ah, HAL_MODE_108G);
5313 struct ath_hal *ah = sc->sc_ah;
5340 if (ath_hal_getdiagstate(ah, id, indata, insize, &outdata, &outsize)) {
5486 struct ath_hal *ah = sc->sc_ah;
5490 ah->ah_macVersion, ah->ah_macRev,
5491 ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf);
5497 ath_hal_getcountrycode(ah, &cc);
5498 modes = ath_hal_getwirelessmodes(ah, cc);
5500 if (ah->ah_analog5GhzRev && ah->ah_analog2GhzRev)
5502 ah->ah_analog5GhzRev >> 4,
5503 ah->ah_analog5GhzRev & 0xf,
5504 ah->ah_analog2GhzRev >> 4,
5505 ah->ah_analog2GhzRev & 0xf);
5507 printf(" radio %d.%d", ah->ah_analog5GhzRev >> 4,
5508 ah->ah_analog5GhzRev & 0xf);
5510 printf(" radio %d.%d", ah->ah_analog5GhzRev >> 4,
5511 ah->ah_analog5GhzRev & 0xf);
Indexes created Mon Sep 29 21:09:56 GMT 2025