Lines Matching refs:SM
797 pll = SM(AR_RTC_9160_PLL_REFDIV, 0x5);
798 pll |= SM(AR_RTC_9160_PLL_DIV, 0x2c);
800 pll = SM(AR_RTC_9160_PLL_REFDIV, 0x05);
807 pll |= SM(AR_RTC_9160_PLL_DIV, 0x28);
809 pll |= SM(AR_RTC_9160_PLL_DIV, 0x2c);
811 pll = SM(AR_RTC_9160_PLL_REFDIV, 0x05);
813 pll |= SM(AR_RTC_9160_PLL_DIV, 0x50);
815 pll |= SM(AR_RTC_9160_PLL_DIV, 0x58);
819 pll |= SM(AR_RTC_PLL_DIV, 0x0a);
821 pll |= SM(AR_RTC_PLL_DIV, 0x0b);
1225 SM(AR_BT_MODE, AR_BT_MODE_SLOTTED) |
1226 SM(AR_BT_PRIORITY_TIME, 2) |
1227 SM(AR_BT_FIRST_SLOT_TIME, 5) |
1228 SM(AR_BT_QCU_THRESH, ATHN_QID_AC_BE) |
1232 SM(AR_BTCOEX_BT_WGHT, AR_STOMP_LOW_BT_WGHT) |
1233 SM(AR_BTCOEX_WL_WGHT, AR_STOMP_LOW_WL_WGHT));
1235 SM(AR_BT_BCN_MISS_THRESH, 50) |
1274 SM(AR_BT_MODE, AR_BT_MODE_DISABLED) | AR_BT_QUIET);
1857 SM(AR_QUIET2_QUIET_DUR, 10));
1917 SM(AR_D_RETRY_LIMIT_STA_SH, 32) |
1918 SM(AR_D_RETRY_LIMIT_STA_LG, 32) |
1919 SM(AR_D_RETRY_LIMIT_FR_SH, 10));
1923 SM(AR_D_MISC_BKOFF_THRESH, 2) |
1932 SM(AR_D_MISC_ARB_LOCKOUT_CNTRL,
1937 SM(AR_D_LCL_IFS_CWMIN, 0) |
1938 SM(AR_D_LCL_IFS_CWMAX, 0) |
1939 SM(AR_D_LCL_IFS_AIFS, 1));
1946 SM(AR_D_MISC_ARB_LOCKOUT_CNTRL,
2019 SM(AR_SLEEP1_CAB_TIMEOUT, AR_CAB_TIMEOUT_VAL * 8) |
2022 SM(AR_SLEEP2_BEACON_TIMEOUT, AR_MIN_BEACON_TIMEOUT_VAL));
2107 SM(AR_BSS_ID1_AID, IEEE80211_AID(ni->ni_associd)));
2169 SM(AR_QOS_NO_ACK_TWO_BIT, 2) |
2170 SM(AR_QOS_NO_ACK_BIT_OFF, 5) |
2171 SM(AR_QOS_NO_ACK_BYTE_OFF, 0));
2314 AR_WRITE(sc, AR_RSSI_THR, SM(AR_RSSI_THR_BM_THR, 7));
2371 AR_WRITE(sc, AR_RIMT, SM(AR_RIMT_FIRST, 2000) | SM(AR_RIMT_LAST, 500));
2579 SM(AR_D_LCL_IFS_CWMIN, ATHN_EXP2(ac->ac_ecwmin)) |
2580 SM(AR_D_LCL_IFS_CWMAX, ATHN_EXP2(ac->ac_ecwmax)) |
2581 SM(AR_D_LCL_IFS_AIFS, ac->ac_aifsn));
2584 SM(AR_D_CHNTIME_DUR,
Indexes created Sun Oct 19 02:09:48 GMT 2025