Cross Reference: /src/sys/dev/ic/bwfm.c

Lines Matching defs:core
1040 	struct bwfm_core *core;
1083 	LIST_FOREACH(core, &sc->sc_chip.ch_list, co_link) {
1085 		    DEVNAME(sc), core->co_id, core->co_rev,
1086 		    core->co_base, core->co_wrapbase));
1088 		switch (core->co_id) {
1105 		printf("%s: CPU core not detected\n", DEVNAME(sc));
1109 		printf("%s: RAM core not provided\n", DEVNAME(sc));
1120 	if ((core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4)) != NULL) {
1121 		bwfm_chip_tcm_ramsize(sc, core);
1123 	} else if ((core = bwfm_chip_get_core(sc, BWFM_AGENT_SYS_MEM)) != NULL) {
1124 		bwfm_chip_sysmem_ramsize(sc, core);
1126 	} else if ((core = bwfm_chip_get_core(sc, BWFM_AGENT_INTERNAL_MEM)) != NULL) {
1127 		bwfm_chip_socram_ramsize(sc, core);
1130 	core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_CHIPCOMMON);
1132 	    core->co_base + BWFM_CHIP_REG_CAPABILITIES);
1134 	    core->co_base + BWFM_CHIP_REG_CAPABILITIES_EXT);
1136 	core = bwfm_chip_get_pmu(sc);
1139 		    core->co_base + BWFM_CHIP_REG_PMUCAPABILITIES);
1153 	struct bwfm_core *core;
1155 	LIST_FOREACH(core, &sc->sc_chip.ch_list, co_link) {
1156 		if (core->co_id == id)
1157 			return core;
1181 bwfm_chip_ai_isup(struct bwfm_softc *sc, struct bwfm_core *core)
1186 	    core->co_wrapbase + BWFM_AGENT_IOCTL);
1188 	    core->co_wrapbase + BWFM_AGENT_RESET_CTL);
1199 bwfm_chip_ai_disable(struct bwfm_softc *sc, struct bwfm_core *core,
1206 	    core->co_wrapbase + BWFM_AGENT_RESET_CTL);
1210 		    core->co_wrapbase + BWFM_AGENT_IOCTL,
1213 		    core->co_wrapbase + BWFM_AGENT_IOCTL);
1216 		    core
1222 			    core->co_wrapbase + BWFM_AGENT_RESET_CTL) ==
1227 			printf("%s: timeout on core reset\n", DEVNAME(sc));
1231 	    core->co_wrapbase + BWFM_AGENT_IOCTL,
1234 	    core->co_wrapbase + BWFM_AGENT_IOCTL);
1238 bwfm_chip_ai_reset(struct bwfm_softc *sc, struct bwfm_core *core,
1243 	bwfm_chip_ai_disable(sc, core, prereset, reset);
1247 		    core->co_wrapbase + BWFM_AGENT_RESET_CTL) &
1251 		    core->co_wrapbase + BWFM_AGENT_RESET_CTL, 0);
1255 		printf("%s: timeout on core reset\n", DEVNAME(sc));
1258 	    core->co_wrapbase + BWFM_AGENT_IOCTL,
1261 	    core->co_wrapbase + BWFM_AGENT_IOCTL);
1271 	struct bwfm_core *core;
1308 		core = kmem_alloc(sizeof(*core), KM_SLEEP);
1309 		core->co_id = id;
1310 		core->co_base = base;
1311 		core->co_wrapbase = wrap;
1312 		core->co_rev = rev;
1313 		LIST_INSERT_HEAD(&sc->sc_chip.ch_list, core, co_link);
1379 /* Core configuration */
1412 	struct bwfm_core *core;
1415 	core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4);
1416 	sc->sc_chip.ch_core_reset(sc, core,
1425 	struct bwfm_core *core;
1428 	core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4);
1430 	    core->co_wrapbase + BWFM_AGENT_IOCTL);
1431 	sc->sc_chip.ch_core_reset(sc, core,
1436 	core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_80211);
1437 	sc->sc_chip.ch_core_reset(sc, core, BWFM_AGENT_D11_IOCTL_PHYRESET |
1445 	struct bwfm_core *core;
1448 	core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7);
1449 	sc->sc_chip.ch_core_reset(sc, core,
1458 	struct bwfm_core *core;
1461 	core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7);
1463 	    core->co_wrapbase + BWFM_AGENT_IOCTL);
1464 	sc->sc_chip.ch_core_reset(sc, core,
1469 	core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_80211);
1470 	sc->sc_chip.ch_core_reset(sc, core, BWFM_AGENT_D11_IOCTL_PHYRESET |
1478 	struct bwfm_core *core;
1480 	core = bwfm_chip_get_core(sc, BWFM_AGENT_INTERNAL_MEM);
1481 	if (!sc->sc_chip.ch_core_isup(sc, core))
1486 	core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3);
1487 	sc->sc_chip.ch_core_reset(sc, core, 0, 0, 0);
1495 	struct bwfm_core *core;
1497 	core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3);
1498 	sc->sc_chip.ch_core_disable(sc, core, 0, 0);
1499 	core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_80211);
1500 	sc->sc_chip.ch_core_reset(sc, core, BWFM_AGENT_D11_IOCTL_PHYRESET |
1503 	core = bwfm_chip_get_core(sc, BWFM_AGENT_INTERNAL_MEM);
1504 	sc->sc_chip.ch_core_reset(sc, core, 0, 0, 0);
1508 		    core->co_base + BWFM_SOCRAM_BANKIDX, 3);
1510 		    core->co_base + BWFM_SOCRAM_BANKPDA, 0);
1517 	struct bwfm_core *core;
1527 		core = bwfm_chip_get_pmu(sc);
1528 		sc->sc_buscore_ops->bc_write(sc, core->co_base +
1530 		reg = sc->sc_buscore_ops->bc_read(sc, core->co_base +
1536 		core = bwfm_chip_get_pmu(sc);
1537 		sc->sc_buscore_ops->bc_write(sc, core->co_base +
1539 		reg = sc->sc_buscore_ops->bc_read(sc, core->co_base +
1543 		core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_CHIPCOMMON);
1544 		reg = sc->sc_buscore_ops->bc_read(sc, core->co_base +
1548 		core = bwfm_chip_get_pmu(sc);
1549 		reg = sc->sc_buscore_ops->bc_read(sc, core->co_base +
1553 		reg = sc->sc_buscore_ops->bc_read(sc, core->co_base +
1562 bwfm_chip_socram_ramsize(struct bwfm_softc *sc, struct bwfm_core *core)
1568 	if (!sc->sc_chip.ch_core_isup(sc, core))
1569 		sc->sc_chip.ch_core_reset(sc, core, 0, 0, 0);
1572 	    core->co_base + BWFM_SOCRAM_COREINFO);
1576 	if (core->co_rev <= 7 || core->co_rev == 12) {
1588 			    core->co_base + BWFM_SOCRAM_BANKIDX,
1592 			    core->co_base + BWFM_SOCRAM_BANKINFO);
1618 bwfm_chip_sysmem_ramsize(struct bwfm_softc *sc, struct bwfm_core *core)
1624 	if (!sc->sc_chip.ch_core_isup(sc, core))
1625 		sc->sc_chip.ch_core_reset(sc, core, 0, 0, 0);
1628 	    core->co_base + BWFM_SOCRAM_COREINFO);
1634 		    core->co_base + BWFM_SOCRAM_BANKIDX,
1638 		    core->co_base + BWFM_SOCRAM_BANKINFO);
1648 bwfm_chip_tcm_ramsize(struct bwfm_softc *sc, struct bwfm_core *core)
1653 	cap = sc->sc_buscore_ops->bc_read(sc, core->co_base + BWFM_ARMCR4_CAP);
1660 		    core->co_base + BWFM_ARMCR4_BANKIDX, i);
1662 		    core->co_base + BWFM_ARMCR4_BANKINFO);
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