Lines Matching defs:cy
1 /* $NetBSD: cy.c,v 1.63 2022/10/26 23:42:04 riastradh Exp $ */
4 * cy.c
19 __KERNEL_RCSID(0, "$NetBSD: cy.c,v 1.63 2022/10/26 23:42:04 riastradh Exp $");
100 printf("cy: card reset done\n");
253 #define CY_BOARD(cy) ((cy)->cy_softc)
283 struct cy_port *cy;
287 cy = CY_PORT(dev);
288 if (cy == NULL)
290 sc = CY_BOARD(cy);
293 if (cy->cy_tty == NULL) {
294 if ((cy->cy_tty = tty_alloc()) == NULL) {
298 cy->cy_port_num);
301 tty_attach(cy->cy_tty);
305 tp = cy->cy_tty;
318 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL))
320 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS))
322 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF))
332 if (cy->cy_ibuf == NULL) {
333 cy->cy_ibuf = malloc(CY_IBUF_SIZE, M_DEVBUF, M_WAITOK);
334 cy->cy_ibuf_end = cy->cy_ibuf + CY_IBUF_SIZE;
337 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf;
340 cd_write_reg(sc, cy->cy_chip, CD1400_CAR,
341 cy->cy_port_num & CD1400_CAR_CHAN);
343 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDRESET);
346 cd_write_reg(sc, cy->cy_chip, CD1400_LIVR,
347 cy->cy_port_num << 3);
349 cy->cy_channel_control = 0;
362 cy_modem_control(sc, cy, TIOCM_RTS, DMBIS);
364 cy->cy_carrier_stat =
365 cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2);
368 cd_write_reg(sc, cy->cy_chip, CD1400_SRER,
372 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) ||
374 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD))
407 struct cy_port *cy;
411 cy = CY_PORT(dev);
412 sc = CY_BOARD(cy);
413 tp = cy->cy_tty;
419 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) {
424 cy_modem_control(sc, cy, 0, DMSET);
444 struct cy_port *cy;
447 cy = CY_PORT(dev);
448 tp = cy->cy_tty;
459 struct cy_port *cy;
462 cy = CY_PORT(dev);
463 tp = cy->cy_tty;
474 struct cy_port *cy;
477 cy = CY_PORT(dev);
478 tp = cy->cy_tty;
489 struct cy_port *cy;
491 cy = CY_PORT(dev);
493 return (cy->cy_tty);
503 struct cy_port *cy;
507 cy = CY_PORT(dev);
508 sc = CY_BOARD(cy);
509 tp = cy->cy_tty;
523 SET(cy->cy_flags, CY_F_START_BREAK);
524 cy_enable_transmitter(sc, cy);
528 SET(cy->cy_flags, CY_F_END_BREAK);
529 cy_enable_transmitter(sc, cy);
533 cy_modem_control(sc, cy, TIOCM_DTR, DMBIS);
537 cy_modem_control(sc, cy, TIOCM_DTR, DMBIC);
541 cy_modem_control(sc, cy, *((int *) data), DMSET);
545 cy_modem_control(sc, cy, *((int *) data), DMBIS);
549 cy_modem_control(sc, cy, *((int *) data), DMBIC);
553 *((int *) data) = cy_modem_control(sc, cy, 0, DMGET);
557 *((int *) data) = cy->cy_openflags |
567 cy->cy_openflags = *((int *) data) &
586 struct cy_port *cy;
589 cy = CY_PORT(tp->t_dev);
590 sc = cy->cy_softc;
595 cy->cy_start_count++;
602 cy_enable_transmitter(sc, cy);
615 struct cy_port *cy;
618 cy = CY_PORT(tp->t_dev);
629 SET(cy->cy_flags, CY_F_STOP);
642 struct cy_port *cy;
646 cy = CY_PORT(tp->t_dev);
647 sc = CY_BOARD(cy);
649 if (t->c_ospeed != 0 && cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0)
652 if (t->c_ispeed != 0 && cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0)
658 cy_modem_control(sc, cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS));
662 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, port & CD1400_CAR_CHAN);
667 cd_write_reg(sc, cy->cy_chip, CD1400_TCOR, o_clk_opt);
668 cd_write_reg(sc, cy->cy_chip, CD1400_TBPR, obpr);
672 cd_write_reg(sc, cy->cy_chip, CD1400_RCOR, i_clk_opt);
673 cd_write_reg(sc, cy->cy_chip, CD1400_RBPR, ibpr);
678 if (opt != cy->cy_channel_control) {
679 cy->cy_channel_control = opt;
680 cd1400_channel_cmd(sc, cy, opt);
713 cd_write_reg(sc, cy->cy_chip, CD1400_COR1, opt);
725 cd_write_reg(sc, cy->cy_chip, CD1400_COR2,
729 cd_write_reg(sc, cy->cy_chip, CD1400_COR3, CY_RX_FIFO_THRESHOLD);
731 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDCORCHG |
734 cd_write_reg(sc, cy->cy_chip, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION);
735 cy->cy_chip, CD1400_COR5, 0);
744 if (cy->cy_clock == CY_CLOCK_60) {
745 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd |
748 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd);
751 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR2, CD1400_MCOR2_CDod);
758 cd_write_reg(sc, cy->cy_chip, CD1400_RTPR, 2);
775 cy_modem_control(struct cy_softc *sc, struct cy_port *cy, int bits, int howto)
777 struct tty *tp = cy->cy_tty;
783 cd_write_reg(sc, cy->cy_chip, CD1400_CAR,
784 cy->cy_port_num & CD1400_CAR_CHAN);
790 if (cy->cy_channel_control & CD1400_CCR_RCVEN)
792 msvr = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2);
793 if (cy->cy_clock == CY_CLOCK_60) {
794 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) &
800 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) &
819 if (cy->cy_clock == CY_CLOCK_60) {
821 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2,
823 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1,
827 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1,
829 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2,
835 if (cy->cy_clock == CY_CLOCK_60) {
838 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2,
841 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1,
846 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1,
849 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2,
855 if (cy->cy_clock == CY_CLOCK_60) {
857 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0);
859 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0);
862 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0);
864 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0);
881 struct cy_port *cy;
907 cy = &sc->sc_ports[port];
908 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL ||
915 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) {
919 line_stat = cy->cy_ibuf_rd_ptr[0];
920 chr = cy->cy_ibuf_rd_ptr[1];
942 if ((cy->cy_ibuf_rd_ptr += 2) ==
943 cy->cy_ibuf_end)
944 cy->cy_ibuf_rd_ptr = cy->cy_ibuf;
962 cd_write_reg(sc, cy->cy_chip, CD1400_CAR,
965 if (cy->cy_clock == CY_CLOCK_60) {
966 if ((cd_read_reg(sc, cy->cy_chip,
968 cd_write_reg(sc, cy->cy_chip,
975 if ((cd_read_reg(sc, cy->cy_chip,
977 cd_write_reg(sc, cy->cy_chip,
990 if (ISSET(cy->cy_flags, CY_F_CARRIER_CHANGED)) {
993 CLR(cy->cy_flags, CY_F_CARRIER_CHANGED);
996 carrier = ((cy->cy_carrier_stat &
1006 cy_modem_control(sc, cy,
1016 if (ISSET(cy->cy_flags, CY_F_START)) {
1017 CLR(cy->cy_flags, CY_F_START);
1029 if (cy->cy_fifo_overruns) {
1030 cy->cy_fifo_overruns = 0;
1038 if (cy->cy_ibuf_overruns) {
1039 cy->cy_ibuf_overruns = 0;
1063 struct cy_port *cy;
1088 cy = &sc->sc_ports[serv_type >> 3];
1091 cy->cy_rx_int_count++;
1094 buf_p = cy->cy_ibuf_wr_ptr;
1097 line_stat = cd_read_reg(sc, cy->cy_chip,
1099 recv_data = cd_read_reg(sc, cy->cy_chip,
1102 if (cy->cy_tty == NULL ||
1103 !ISSET(cy->cy_tty->t_state, TS_ISOPEN))
1111 cy->cy_port_num, line_stat, recv_data);
1114 cy->cy_fifo_overruns++;
1118 if (buf_p == cy->cy_ibuf_end)
1119 buf_p = cy->cy_ibuf;
1121 if (buf_p == cy->cy_ibuf_rd_ptr) {
1122 if (buf_p == cy->cy_ibuf)
1123 buf_p = cy->cy_ibuf_end;
1125 cy->cy_ibuf_overruns++;
1129 n_chars = cd_read_reg(sc, cy->cy_chip,
1133 if (cy->cy_tty == NULL ||
1134 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) {
1137 cy->cy_chip, CD1400_RDSR);
1144 cy->cy_port_num, n_chars);
1150 cy->cy_chip, CD1400_RDSR);
1151 if (buf_p == cy->cy_ibuf_end)
1152 buf_p = cy->cy_ibuf;
1153 if (buf_p == cy->cy_ibuf_rd_ptr) {
1154 if (buf_p == cy->cy_ibuf)
1155 buf_p = cy->cy_ibuf_end;
1157 cy->cy_ibuf_overruns++;
1164 cy->cy_ibuf_wr_ptr = buf_p;
1167 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) {
1170 bf = buf_p - cy->cy_ibuf_rd_ptr;
1176 if (cy->cy_clock == CY_CLOCK_60)
1180 cd_write_reg(sc, cy->cy_chip, msvr, 0);
1186 cd_write_reg(sc, cy->cy_chip, CD1400_RIR,
1188 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car);
1200 cy = &sc->sc_ports[serv_type >> 3];
1203 cy->cy_modem_int_count++;
1206 modem_stat = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2);
1211 cy->cy_port_num, modem_stat);
1213 if (ISSET((cy->cy_carrier_stat ^ modem_stat), CD1400_MSVR2_CD)) {
1214 SET(cy->cy_flags, CY_F_CARRIER_CHANGED);
1217 cy->cy_carrier_stat = modem_stat;
1220 cd_write_reg(sc, cy->cy_chip, CD1400_MIR, save_mir & 0x3f);
1221 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car);
1235 cy = &sc->sc_ports[serv_type >> 3];
1238 cy->cy_tx_int_count++;
1242 cy->cy_port_num);
1246 tp = cy->cy_tty;
1247 if (tp == NULL || ISSET(cy->cy_flags, CY_F_STOP))
1251 if (ISSET(cy->cy_flags, CY_F_SEND_NUL)) {
1252 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0);
1253 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0);
1255 CLR(cy->cy_flags, CY_F_SEND_NUL);
1269 SET(cy->cy_flags, CY_F_SEND_NUL);
1272 cd_write_reg(sc, cy->cy_chip,
1276 cd_write_reg(sc, cy->cy_chip,
1289 if (ISSET(cy->cy_flags, CY_F_START_BREAK)) {
1290 cd_write_reg(sc, cy->cy_chip,
1292 cd_write_reg(sc, cy->cy_chip,
1294 CLR(cy->cy_flags, CY_F_START_BREAK);
1296 if (ISSET(cy->cy_flags, CY_F_END_BREAK)) {
1297 cd_write_reg(sc, cy->cy_chip,
1299 cd_write_reg(sc, cy->cy_chip,
1301 CLR(cy->cy_flags, CY_F_END_BREAK);
1311 cd_write_reg(sc, cy->cy_chip, CD1400_SRER,
1312 cd_read_reg(sc, cy->cy_chip, CD1400_SRER)
1314 CLR(cy->cy_flags, CY_F_STOP);
1318 SET(cy->cy_flags, CY_F_START);
1322 cd_write_reg(sc, cy->cy_chip, CD1400_TIR, save_tir & 0x3f);
1323 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car);
1338 cy_enable_transmitter(struct cy_softc *sc, struct cy_port *cy)
1341 cd_write_reg(sc, cy->cy_chip, CD1400_CAR,
1342 cy->cy_port_num & CD1400_CAR_CHAN);
1343 cd_write_reg(sc, cy->cy_chip, CD1400_SRER,
1344 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) | CD1400_SRER_TXRDY);
1352 cd1400_channel_cmd(struct cy_softc *sc, struct cy_port *cy, int cmd)
1357 printf("c1400_channel_cmd cy %p command 0x%x\n", cy, cmd);
1361 while (cd_read_reg(sc, cy->cy_chip, CD1400_CCR) != 0 && waitcnt-- > 0);
1367 cd_write_reg(sc, cy->cy_chip, CD1400_CCR, cmd);
Indexes created Wed Oct 01 07:09:59 GMT 2025