Cross Reference: /src/sys/dev/ic/hd44780

Lines Matching defs:en
272 	int curdaddr, en, chipdaddr;
276 	en = DADDR_TO_CHIPNO(daddr);
279 		hd44780_ir_write(sc, en, cmd_ddramset(chipdaddr));
281 	hd44780_dr_write(sc, en, c);
420 hd44780_chipinit(struct hd44780_chip *sc, uint32_t en)
428 	hd44780_ir_write(sc, en, cmd);
430 	hd44780_ir_write(sc, en, cmd);
431 	hd44780_ir_write(sc, en, cmd);
439 		hd44780_ir_write(sc, en, cmd);
443 	hd44780_ir_write(sc, en, cmd);
444 	hd44780_ir_write(sc, en, cmd_dispctl(0, 0, 0));
445 	hd44780_ir_write(sc, en, cmd_clear());
446 	hd44780_ir_write(sc, en, cmd_modset(1, 0));
454 	hd44780_ir_write(sc, en, cmd_clear());
455 	hd44780_ir_write(sc, en, cmd_dispctl(1, 0, 0));
458 	hd44780_ir_write(sc, en, cmd_ddramset(0x5));
459 	hd44780_ir_write(sc, en, cmd_shift(0, 1));
460 	hd44780_busy_wait(sc, en);
462 	    (dat = hd44780_ir_read(sc, en) & 0x7f) != 0x6) {
467 	hd44780_ir_write(sc, en, cmd_ddramset(0));
480 	uint32_t en = sc->sc_curchip;
489 		hd44780_ir_write(sc, en, cmd_clear());
494 		hd44780_ir_write(sc, en, cmd_shift(0, 0));
499 		hd44780_ir_write(sc, en, cmd_shift(0, 1));
504 		hd44780_ir_write(sc, en, cmd_dispctl(
531 		hd44780_io()->dat = (hd44780_ir_read(sc, en) & 0x7f);
536 		hd44780_ir_write(sc, en, cmd_ddramset(hd44780_io()->dat));
541 		tmp = (hd44780_ir_read(sc, en) & 0x7f);
542 		hd44780_ir_write(sc, en, cmd_ddramset(tmp));
543 		hd44780_io()->dat = hd44780_dr_read(sc, en);
548 		hd44780_dr_write(sc, en, hd44780_io()->dat);
553 		hd44780_ir_write(sc, en, cmd_shift(1, 0));
558 		hd44780_ir_write(sc, en, cmd_shift(1, 1));
563 		hd44780_ir_write(sc, en, cmd_rethome());
568 		error = hd44780_ddram_io(sc, en, hd44780_io(), HD_DDRAM_WRITE);
573 		error = hd44780_ddram_io(sc, en, hd44780_io(), HD_DDRAM_READ);
578 		hd44780_ddram_redraw(sc, en, hd44780_io());
583 		hd44780_ir_write(sc, en, hd44780_io()->dat);
588 		hd44780_dr_write(sc, en, hd44780_io()->dat);
615 hd44780_ddram_io(struct hd44780_chip *sc, uint32_t en, struct hd44780_io *io,
627 			hd44780_ir_write(sc, en, cmd_ddramset(addr));
629 				io->buf[i] = hd44780_dr_read(sc, en);
631 				hd44780_dr_write(sc, en, io->buf[i]);
641 			hd44780_ir_write(sc, en
643 				io->buf[i] = hd44780_dr_read(sc, en);
645 				hd44780_dr_write(sc, en, io->buf[i]);
659 hd44780_ddram_redraw(struct hd44780_chip *sc, uint32_t en,
664 	hd44780_ir_write(sc, en, cmd_clear());
665 	hd44780_ir_write(sc, en, cmd_rethome());
666 	hd44780_ir_write(sc, en, cmd_ddramset(HD_ROW1_ADDR));
668 		hd44780_dr_write(sc, en, io->buf[i]);
670 	hd44780_ir_write(sc, en, cmd_ddramset(HD_ROW2_ADDR));
672 		hd44780_dr_write(sc, en, io->buf[i]);
676 hd44780_busy_wait(struct hd44780_chip *sc, uint32_t en)
683 	while (nloops-- && (hd44780_ir_read(sc, en) & BUSY_FLAG) == BUSY_FLAG)
697 hd44780_writereg(struct hd44780_chip *sc, uint32_t en, uint32_t reg,
719 hd44780_readreg(struct hd44780_chip *sc, uint32_t en, uint32_t reg)
740 hd44780_writereg(struct hd44780_chip *sc, uint32_t en, uint32_t reg,
764 hd44780_readreg(struct hd44780_chip *sc, uint32_t en, uint32_t reg)
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