Lines Matching defs:tgt
1370 int tgt;
1390 for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
1394 if (sdp->isp_devparam[tgt].dev_enable == 0) {
1398 sdf = sdp->isp_devparam[tgt].goal_flags;
1418 sdp->isp_devparam[tgt].goal_flags = sdf = DPARM_DEFAULT;
1421 mbs.param[1] = (chan << 15) | (tgt << 8);
1427 (sdp->isp_devparam[tgt].goal_offset << 8) |
1428 (sdp->isp_devparam[tgt].goal_period);
1430 isp_prt(isp, ISP_LOGDEBUG0, "Initial Settings bus%d tgt%d flags 0x%x off 0x%x per 0x%x",
1431 chan, tgt, mbs.param[2], mbs.param[3] >> 8, mbs.param[3] & 0xff);
1436 mbs.param[1] = (tgt << 8) | (chan << 15);
1456 sdp->isp_devparam[tgt].actv_flags = sdf & ~DPARM_TQING;
1459 mbs.param[1] = (chan << 15) | (tgt << 8) | lun;
1461 mbs.param[3] = sdp->isp_devparam[tgt].exc_throttle;
1468 for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
1469 if (sdp->isp_devparam[tgt].dev_refresh) {
4470 int chan, tgt;
4508 tgt = va_arg(ap, int);
4518 hdlidx = fcp->isp_dev_map[tgt] - 1;
4522 "target %d", chan, hdlidx, tgt);
4530 hdlidx, tgt);
4576 chan, tgt, sp->req_completion_status);
4580 mbs.param[1] = tgt;
4583 mbs.param[1] = (tgt << 8);
4586 mbs.param[1] = (chan << 15) | (tgt << 8);
4595 "Target %d on Bus %d Reset Succeeded", tgt, chan);
4604 tgt = XS_TGT(xs);
4620 hdlidx = fcp->isp_dev_map[tgt] - 1;
4624 "target %d", chan, hdlidx, tgt);
4631 "no longer valid", chan, hdlidx, tgt);
4682 mbs.param[1] = tgt;
4684 mbs.param[1] = tgt << 8;
4688 mbs.param[1] = tgt << 8 | XS_LUN(xs);
4691 mbs.param[1] = (chan << 15) | (tgt << 8) | XS_LUN(xs);
4773 tgt = va_arg(ap, int);
4776 return (isp_getpdb(isp, chan, tgt, pdb, 1));
4785 tgt = va_arg(ap, int);
4793 *wwnn = isp_get_wwn(isp, chan, tgt, 1);
4799 *wwnp = isp_get_wwn(isp, chan, tgt, 0);
7323 int tgt;
7336 for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
7340 if (sdp->isp_devparam[tgt].dev_enable == 0) {
7341 sdp->isp_devparam[tgt].dev_update = 0;
7342 sdp->isp_devparam[tgt].dev_refresh = 0;
7343 isp_prt(isp, ISP_LOGDEBUG0, "skipping target %d bus %d update", tgt, chan);
7358 if (sdp->isp_devparam[tgt].dev_refresh) {
7361 } else if (sdp->isp_devparam[tgt].dev_update) {
7368 sdp->isp_devparam[tgt].goal_flags |= DPARM_RENEG;
7369 sdp->isp_devparam[tgt].goal_flags &= ~DPARM_QFRZ;
7370 mbs.param[2] = sdp->isp_devparam[tgt].goal_flags;
7382 (sdp->isp_devparam[tgt].goal_offset << 8) |
7383 (sdp->isp_devparam[tgt].goal_period);
7396 sdp->isp_devparam[tgt].actv_flags &= ~DPARM_TQING;
7397 sdp->isp_devparam[tgt].actv_flags |=
7398 (sdp->isp_devparam[tgt].goal_flags & DPARM_TQING);
7399 isp_prt(isp, ISP_LOGDEBUG0, "bus %d set tgt %d flags 0x%x off 0x%x period 0x%x",
7400 chan, tgt, mbs.param[2], mbs.param[3] >> 8, mbs.param[3] & 0xff);
7405 mbs.param[1] = (chan << 15) | (tgt << 8);
7412 sdp->isp_devparam[tgt].dev_update = 0;
7413 sdp->isp_devparam[tgt].dev_refresh = 1;
7415 sdp->isp_devparam[tgt].dev_refresh = 0;
7419 sdp->isp_devparam[tgt].actv_flags = flags;
7420 sdp->isp_devparam[tgt].actv_period = period;
7421 sdp->isp_devparam[tgt].actv_offset = offset;
7422 isp_async(isp, ISPASYNC_NEW_TGT_PARAMS, chan, tgt);
7426 for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
7427 if (sdp->isp_devparam[tgt].dev_update ||
7428 sdp->isp_devparam[tgt].dev_refresh) {
7438 int tgt;
7473 for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
7474 sdp->isp_devparam[tgt].exc_throttle = ISP_EXEC_THROTTLE;
7475 sdp->isp_devparam[tgt].dev_enable = 1;
7484 for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
7486 sdp->isp_devparam[tgt].actv_offset = 0;
7487 sdp->isp_devparam[tgt].actv_period = 0;
7488 sdp->isp_devparam[tgt].actv_flags = 0;
7490 sdp->isp_devparam[tgt].goal_flags =
7491 sdp->isp_devparam[tgt].nvrm_flags = DPARM_DEFAULT;
7518 sdp->isp_devparam[tgt].goal_offset =
7519 sdp->isp_devparam[tgt].nvrm_offset = off;
7520 sdp->isp_devparam[tgt].goal_period =
7521 sdp->isp_devparam[tgt].nvrm_period = per;
7914 int tgt;
7969 for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
7970 sdp->isp_devparam[tgt].dev_enable =
7971 ISP_NVRAM_TGT_DEVICE_ENABLE(nvram_data, tgt);
7972 sdp->isp_devparam[tgt].exc_throttle =
7973 ISP_NVRAM_TGT_EXEC_THROTTLE(nvram_data, tgt);
7974 sdp->isp_devparam[tgt].nvrm_offset =
7975 ISP_NVRAM_TGT_SYNC_OFFSET(nvram_data, tgt);
7976 sdp->isp_devparam[tgt].nvrm_period =
7977 ISP_NVRAM_TGT_SYNC_PERIOD(nvram_data, tgt);
7988 if (sdp->isp_devparam[tgt].nvrm_period < 0x19) {
7989 sdp->isp_devparam[tgt].nvrm_period = 0x19;
7991 if (sdp->isp_devparam[tgt].nvrm_offset > 0xc) {
7992 sdp->isp_devparam[tgt].nvrm_offset = 0x0c;
7995 if (sdp->isp_devparam[tgt].nvrm_offset > 0x8) {
7996 sdp->isp_devparam[tgt].nvrm_offset = 0x8;
7999 sdp->isp_devparam[tgt].nvrm_flags = 0;
8000 if (ISP_NVRAM_TGT_RENEG(nvram_data, tgt))
8001 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_RENEG;
8002 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_ARQ;
8003 if (ISP_NVRAM_TGT_TQING(nvram_data, tgt))
8004 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_TQING;
8005 if (ISP_NVRAM_TGT_SYNC(nvram_data, tgt))
8006 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_SYNC;
8007 if (ISP_NVRAM_TGT_WIDE(nvram_data, tgt))
8008 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_WIDE;
8009 if (ISP_NVRAM_TGT_PARITY(nvram_data, tgt))
8010 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_PARITY;
8011 if (ISP_NVRAM_TGT_DISC(nvram_data, tgt))
8012 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_DISC;
8013 sdp->isp_devparam[tgt].actv_flags = 0; /* we don't know */
8014 sdp->isp_devparam[tgt].goal_offset =
8015 sdp->isp_devparam[tgt].nvrm_offset;
8016 sdp->isp_devparam[tgt].goal_period =
8017 sdp->isp_devparam[tgt].nvrm_period;
8018 sdp->isp_devparam[tgt].goal_flags =
8019 sdp->isp_devparam[tgt].nvrm_flags;
8027 int tgt;
8066 for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
8067 sdp->isp_devparam[tgt].dev_enable =
8068 ISP1080_NVRAM_TGT_DEVICE_ENABLE(nvram_data, tgt, bus);
8069 sdp->isp_devparam[tgt].exc_throttle =
8070 ISP1080_NVRAM_TGT_EXEC_THROTTLE(nvram_data, tgt, bus);
8071 sdp->isp_devparam[tgt].nvrm_offset =
8072 ISP1080_NVRAM_TGT_SYNC_OFFSET(nvram_data, tgt, bus);
8073 sdp->isp_devparam[tgt].nvrm_period =
8074 ISP1080_NVRAM_TGT_SYNC_PERIOD(nvram_data, tgt, bus);
8075 sdp->isp_devparam[tgt].nvrm_flags = 0;
8076 if (ISP1080_NVRAM_TGT_RENEG(nvram_data, tgt, bus))
8077 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_RENEG;
8078 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_ARQ;
8079 if (ISP1080_NVRAM_TGT_TQING(nvram_data, tgt, bus))
8080 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_TQING;
8081 if (ISP1080_NVRAM_TGT_SYNC(nvram_data, tgt, bus))
8082 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_SYNC;
8083 if (ISP1080_NVRAM_TGT_WIDE(nvram_data, tgt, bus))
8084 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_WIDE;
8085 if (ISP1080_NVRAM_TGT_PARITY(nvram_data, tgt, bus))
8086 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_PARITY;
8087 if (ISP1080_NVRAM_TGT_DISC(nvram_data, tgt, bus))
8088 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_DISC;
8089 sdp->isp_devparam[tgt].actv_flags = 0;
8090 sdp->isp_devparam[tgt].goal_offset =
8091 sdp->isp_devparam[tgt].nvrm_offset;
8092 sdp->isp_devparam[tgt].goal_period =
8093 sdp->isp_devparam[tgt].nvrm_period;
8094 sdp->isp_devparam[tgt].goal_flags =
8095 sdp->isp_devparam[tgt].nvrm_flags;
8103 int tgt;
8142 for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
8143 sdp->isp_devparam[tgt].dev_enable =
8144 ISP12160_NVRAM_TGT_DEVICE_ENABLE(nvram_data, tgt, bus);
8145 sdp->isp_devparam[tgt].exc_throttle =
8146 ISP12160_NVRAM_TGT_EXEC_THROTTLE(nvram_data, tgt, bus);
8147 sdp->isp_devparam[tgt].nvrm_offset =
8148 ISP12160_NVRAM_TGT_SYNC_OFFSET(nvram_data, tgt, bus);
8149 sdp->isp_devparam[tgt].nvrm_period =
8150 ISP12160_NVRAM_TGT_SYNC_PERIOD(nvram_data, tgt, bus);
8151 sdp->isp_devparam[tgt].nvrm_flags = 0;
8152 if (ISP12160_NVRAM_TGT_RENEG(nvram_data, tgt, bus))
8153 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_RENEG;
8154 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_ARQ;
8155 if (ISP12160_NVRAM_TGT_TQING(nvram_data, tgt, bus))
8156 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_TQING;
8157 if (ISP12160_NVRAM_TGT_SYNC(nvram_data, tgt, bus))
8158 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_SYNC;
8159 if (ISP12160_NVRAM_TGT_WIDE(nvram_data, tgt, bus))
8160 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_WIDE;
8161 if (ISP12160_NVRAM_TGT_PARITY(nvram_data, tgt, bus))
8162 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_PARITY;
8163 if (ISP12160_NVRAM_TGT_DISC(nvram_data, tgt, bus))
8164 sdp->isp_devparam[tgt].nvrm_flags |= DPARM_DISC;
8165 sdp->isp_devparam[tgt].actv_flags = 0;
8166 sdp->isp_devparam[tgt].goal_offset =
8167 sdp->isp_devparam[tgt].nvrm_offset;
8168 sdp->isp_devparam[tgt].goal_period =
8169 sdp->isp_devparam[tgt].nvrm_period;
8170 sdp->isp_devparam[tgt].goal_flags =
8171 sdp->isp_devparam[tgt].nvrm_flags;
Indexes created Sun Sep 28 12:09:53 GMT 2025