Lines Matching refs:BIU_BLOCK
96 #define BIU_BLOCK (0 << _BLK_REG_SHFT)
106 #define BIU_ID_LO (BIU_BLOCK+0x0) /* R : Bus ID, Low */
107 #define BIU2100_FLASH_ADDR (BIU_BLOCK+0x0)
108 #define BIU_ID_HI (BIU_BLOCK+0x2) /* R : Bus ID, High */
109 #define BIU2100_FLASH_DATA (BIU_BLOCK+0x2)
110 #define BIU_CONF0 (BIU_BLOCK+0x4) /* R : Bus Configuration #0 */
111 #define BIU_CONF1 (BIU_BLOCK+0x6) /* R : Bus Configuration #1 */
112 #define BIU2100_CSR (BIU_BLOCK+0x6)
113 #define BIU_ICR (BIU_BLOCK+0x8) /* RW : Bus Interface Ctrl */
114 #define BIU_ISR (BIU_BLOCK+0xA) /* R : Bus Interface Status */
115 #define BIU_SEMA (BIU_BLOCK+0xC) /* RW : Bus Semaphore */
116 #define BIU_NVRAM (BIU_BLOCK+0xE) /* RW : Bus NVRAM */
120 #define BIU_REQINP (BIU_BLOCK+0x10) /* Request Queue In */
121 #define BIU_REQOUTP (BIU_BLOCK+0x12) /* Request Queue Out */
122 #define BIU_RSPINP (BIU_BLOCK+0x14) /* Response Queue In */
123 #define BIU_RSPOUTP (BIU_BLOCK+0x16) /* Response Queue Out */
125 #define BIU_R2HSTSLO (BIU_BLOCK+0x18)
126 #define BIU_R2HSTSHI (BIU_BLOCK+0x1A)
143 #define DFIFO_COMMAND (BIU_BLOCK+0x60) /* RW : Command FIFO Port */
145 #define DFIFO_DATA (BIU_BLOCK+0x62) /* RW : Data FIFO Port */
358 #define BIU2400_FLASH_ADDR (BIU_BLOCK+0x00)
359 #define BIU2400_FLASH_DATA (BIU_BLOCK+0x04)
360 #define BIU2400_CSR (BIU_BLOCK+0x08)
361 #define BIU2400_ICR (BIU_BLOCK+0x0C)
362 #define BIU2400_ISR (BIU_BLOCK+0x10)
364 #define BIU2400_REQINP (BIU_BLOCK+0x1C) /* Request Queue In */
365 #define BIU2400_REQOUTP (BIU_BLOCK+0x20) /* Request Queue Out */
366 #define BIU2400_RSPINP (BIU_BLOCK+0x24) /* Response Queue In */
367 #define BIU2400_RSPOUTP (BIU_BLOCK+0x28) /* Response Queue Out */
369 #define BIU2400_PRI_REQINP (BIU_BLOCK+0x2C) /* Priority Request Q In */
370 #define BIU2400_PRI_REQOUTP (BIU_BLOCK+0x30) /* Priority Request Q Out */
372 #define BIU2400_ATIO_RSPINP (BIU_BLOCK+0x3C) /* ATIO Queue In */
373 #define BIU2400_ATIO_RSPOUTP (BIU_BLOCK+0x40) /* ATIO Queue Out */
375 #define BIU2400_R2HSTSLO (BIU_BLOCK+0x44)
376 #define BIU2400_R2HSTSHI (BIU_BLOCK+0x46)
378 #define BIU2400_HCCR (BIU_BLOCK+0x48)
379 #define BIU2400_GPIOD (BIU_BLOCK+0x4C)
380 #define BIU2400_GPIOE (BIU_BLOCK+0x50)
381 #define BIU2400_HSEMA (BIU_BLOCK+0x58)
498 #define FPM_DIAG_CONFIG (BIU_BLOCK + 0x96)
501 #define FBM_CMD (BIU_BLOCK + 0xB8)
Indexes created Mon Oct 20 15:10:11 GMT 2025