Cross Reference: /src/sys/dev/ic/lsi64854.c

Lines Matching refs:csr
87 	uint32_t csr;
113 	csr = L64854_GCSR(sc);
114 	sc->sc_rev = csr & L64854_DEVID;
139 	DPRINTF(LDB_ANY, (", burst 0x%x, csr 0x%x", sc->sc_burst, csr));
150 		printf("%s: line %d: CSR = 0x%lx\n", __FILE__, __LINE__, \
206 	uint32_t csr;
209 	csr = L64854_GCSR(sc);
211 	DPRINTF(LDB_ANY, ("%s: csr 0x%x\n", __func__, csr));
220 		L64854_SCSR(sc, csr | D_HW_RESET_FAS366);
223 	csr |= L64854_RESET;		/* reset DMA */
224 	L64854_SCSR(sc, csr);
228 	csr = L64854_GCSR(sc);
229 	csr &= ~L64854_RESET;		/* de-assert reset line */
230 	L64854_SCSR(sc, csr);
233 	csr = L64854_GCSR(sc);
234 	csr |= L64854_INT_EN;		/* enable interrupts */
237 			csr |= D_TWO_CYCLE;
239 			csr |= D_FASTER;
246 		csr &= ~L64854_BURST_SIZE;
248 			csr |= L64854_BURST_32;
250 			csr |= L64854_BURST_16;
252 			csr |= L64854_BURST_0;
256 		csr |= D_ESC_AUTODRAIN;	/* Auto-drain */
258 			csr &= ~D_ESC_BURST;
260 			csr |= D_ESC_BURST;
265 	L64854_SCSR(sc, csr);
270 		sc->sc_dmactl = csr;
274 	DPRINTF(LDB_ANY, ("%s: done, csr 0x%x\n", __func__, csr));
286 	uint32_t csr;
346 	csr = L64854_GCSR(sc);
349 		csr |= L64854_WRITE;
351 		csr &= ~L64854_WRITE;
352 	csr |= L64854_INT_EN;
355 		csr |= (D_DSBL_SCSI_DRN | D_EN_DMA);
358 	L64854_SCSR(sc, csr);
377 	uint32_t csr;
379 	csr = L64854_GCSR(sc);
381 	snprintb(bits, sizeof(bits), DDMACSR_BITS, csr);
383 	DPRINTF(LDB_SCSI, ("%s: %s: addr 0x%x, csr %s\n",
389 	if (csr & (D_ERR_PEND|D_SLAVE_ERR)) {
390 		snprintb(bits, sizeof(bits), DDMACSR_BITS, csr);
391 		printf("%s: error: csr=%s\n", device_xname(sc->sc_dev), bits);
392 		csr &= ~D_EN_DMA;	/* Stop DMA */
394 		csr |= D_INVALIDATE|D_SLAVE_ERR;
395 		L64854_SCSR(sc, csr);
406 	csr &= ~D_EN_DMA;
407 	L64854_SCSR(sc, csr);
428 	if (!(csr & D_WRITE) &&
477 		    (csr & D_WRITE) != 0 ?
505 	uint32_t csr;
509 	csr = L64854_GCSR(sc);
512 	rv = ((csr & E_INT_PEND) != 0) ? 1 : 0;
514 	if (csr & (E_ERR_PEND|E_SLAVE_ERR)) {
515 		snprintb(bits, sizeof(bits), EDMACSR_BITS, csr);
516 		printf("%s: error: csr=%s\n", device_xname(sc->sc_dev), bits);
517 		csr &= ~L64854_EN_DMA;	/* Stop DMA */
519 		csr |= E_INVALIDATE|E_SLAVE_ERR;
520 		L64854_SCSR(sc, csr);
528 		csr |= E_DRAIN;
529 		L64854_SCSR(sc, csr);
544 	uint32_t csr;
584 	csr = L64854_GCSR(sc);
585 	csr &= ~L64854_BURST_SIZE;
587 		csr |= L64854_BURST_32;
589 		csr |= L64854_BURST_16;
591 		csr |= L64854_BURST_0;
593 	csr |= P_EN_DMA|P_INT_EN|P_EN_CNT;
595 	/* This bit is read-only in PP csr register */
597 		csr |= P_WRITE;
599 		csr &= ~P_WRITE;
601 	L64854_SCSR(sc, csr);
614 	uint32_t csr;
616 	csr = L64854_GCSR(sc);
619 	snprintb(bits, sizeof(bits), PDMACSR_BITS, csr);
621 	DPRINTF(LDB_PP, ("%s: pp intr: addr 0x%x, csr %s\n",
626 	if (csr & (P_ERR_PEND|P_SLAVE_ERR)) {
629 		snprintb(bits, sizeof(bits), PDMACSR_BITS, csr);
630 		printf("%s: pp error: resid %d csr=%s\n",
632 		csr &= ~P_EN_DMA;	/* Stop DMA */
634 		csr |= P_INVALIDATE|P_SLAVE_ERR;
635 		L64854_SCSR(sc, csr);
639 	ret = (csr & P_INT_PEND) != 0;
648 	csr &= ~D_EN_DMA;
649 	L64854_SCSR(sc, csr);
661 		    (csr & D_WRITE) != 0 ?
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