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Lines Matching defs:WRITE4

69 #define WRITE4(sc, reg, val)						\
275 		WRITE4(sc, RTSX_BIER, 0);
362 	WRITE4(sc, RTSX_BIPR, status);
369 	WRITE4(sc, RTSX_BIER,
940 	WRITE4(sc, RTSX_HAIMR, RTSX_HAIMR_BUSY |
959 	WRITE4(sc, RTSX_HAIMR,
1138 	WRITE4(sc, RTSX_HCBAR, sc->sc_regs4[0]);
1139 	WRITE4(sc, RTSX_HCBCTLR, sc->sc_regs4[1]);
1140 	WRITE4(sc, RTSX_HDBAR, sc->sc_regs4[2]);
1141 	WRITE4(sc, RTSX_HDBCTLR, sc->sc_regs4[3]);
1142 	WRITE4(sc, RTSX_HAIMR, sc->sc_regs4[4]);
1143 	WRITE4(sc, RTSX_BIER, sc->sc_regs4[5]);
1193 	WRITE4(sc, RTSX_HCBAR, sc->sc_dmap_cmd->dm_segs[0].ds_addr);
1194 	WRITE4(sc, RTSX_HCBCTLR,
1464 	WRITE4(sc, RTSX_HDBAR, cmd->c_dmamap->dm_segs[0].ds_addr);
1465 	WRITE4(sc, RTSX_HDBCTLR, RTSX_TRIG_DMA | (read ? RTSX_DMA_READ : 0) |
1629 	WRITE4(sc, RTSX_HCBCTLR, RTSX_STOP_CMD);
1635 	WRITE4(sc, RTSX_HDBCTLR, RTSX_STOP_DMA);
1713 	WRITE4(sc, RTSX_BIPR, status);